1 /* 2 * Copyright (C) 2017 DENX Software Engineering 3 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __DISPL5_COMMON_H_ 9 #define __DISPL5_COMMON_H_ 10 11 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 12 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 13 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 14 15 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 16 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ 17 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 18 19 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 20 PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \ 21 PAD_CTL_DSE_40ohm | PAD_CTL_HYS) 22 23 #define SPI_PAD_CTRL (PAD_CTL_HYS | \ 24 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ 25 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 26 27 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 28 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 29 PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ 30 PAD_CTL_ODE | PAD_CTL_SRE_FAST) 31 32 #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ 33 PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 34 35 void displ5_set_iomux_uart_spl(void); 36 void displ5_set_iomux_uart(void); 37 void displ5_set_iomux_ecspi_spl(void); 38 void displ5_set_iomux_ecspi(void); 39 void displ5_set_iomux_usdhc_spl(void); 40 void displ5_set_iomux_usdhc(void); 41 42 #endif /* __DISPL5_COMMON_H_ */ 43