183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2a3eec24aSLukasz Majewski /*
3a3eec24aSLukasz Majewski  * Copyright (C) 2017 DENX Software Engineering
4a3eec24aSLukasz Majewski  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5a3eec24aSLukasz Majewski  */
6a3eec24aSLukasz Majewski 
7a3eec24aSLukasz Majewski #ifndef __DISPL5_COMMON_H_
8a3eec24aSLukasz Majewski #define __DISPL5_COMMON_H_
9a3eec24aSLukasz Majewski 
10a3eec24aSLukasz Majewski #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |	       \
11a3eec24aSLukasz Majewski 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	       \
12a3eec24aSLukasz Majewski 	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
13a3eec24aSLukasz Majewski 
14a3eec24aSLukasz Majewski #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |	       \
15a3eec24aSLukasz Majewski 	PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |	       \
16a3eec24aSLukasz Majewski 	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
17a3eec24aSLukasz Majewski 
18a3eec24aSLukasz Majewski #define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
19a3eec24aSLukasz Majewski 	PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED	  |		\
20a3eec24aSLukasz Majewski 	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
21a3eec24aSLukasz Majewski 
22a3eec24aSLukasz Majewski #define SPI_PAD_CTRL (PAD_CTL_HYS |				\
23a3eec24aSLukasz Majewski 	PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |		\
24a3eec24aSLukasz Majewski 	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
25a3eec24aSLukasz Majewski 
26a3eec24aSLukasz Majewski #define I2C_PAD_CTRL	(PAD_CTL_PKE | PAD_CTL_PUE |		\
27a3eec24aSLukasz Majewski 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
28a3eec24aSLukasz Majewski 	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |			\
29a3eec24aSLukasz Majewski 	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
30a3eec24aSLukasz Majewski 
31a3eec24aSLukasz Majewski #define ENET_PAD_CTRL_CLK  ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
32a3eec24aSLukasz Majewski 	PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
33a3eec24aSLukasz Majewski 
34a3eec24aSLukasz Majewski void displ5_set_iomux_uart_spl(void);
35a3eec24aSLukasz Majewski void displ5_set_iomux_uart(void);
36a3eec24aSLukasz Majewski void displ5_set_iomux_ecspi_spl(void);
37a3eec24aSLukasz Majewski void displ5_set_iomux_ecspi(void);
38a3eec24aSLukasz Majewski void displ5_set_iomux_usdhc_spl(void);
39a3eec24aSLukasz Majewski void displ5_set_iomux_usdhc(void);
40*27aede24SLukasz Majewski void displ5_set_iomux_misc_spl(void);
41a3eec24aSLukasz Majewski 
42a3eec24aSLukasz Majewski #endif /* __DISPL5_COMMON_H_ */
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