1*8d811ca3SNobuhiro Iwamatsu /* 2*8d811ca3SNobuhiro Iwamatsu * (C) Copyright 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3*8d811ca3SNobuhiro Iwamatsu * (C) Copyright 2012 Renesas Solutions Corp. 4*8d811ca3SNobuhiro Iwamatsu * 5*8d811ca3SNobuhiro Iwamatsu * See file CREDITS for list of people who contributed to this 6*8d811ca3SNobuhiro Iwamatsu * project. 7*8d811ca3SNobuhiro Iwamatsu * 8*8d811ca3SNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 9*8d811ca3SNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 10*8d811ca3SNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 11*8d811ca3SNobuhiro Iwamatsu * the License, or (at your option) any later version. 12*8d811ca3SNobuhiro Iwamatsu * 13*8d811ca3SNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 14*8d811ca3SNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*8d811ca3SNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*8d811ca3SNobuhiro Iwamatsu * GNU General Public License for more details. 17*8d811ca3SNobuhiro Iwamatsu * 18*8d811ca3SNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 19*8d811ca3SNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 20*8d811ca3SNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*8d811ca3SNobuhiro Iwamatsu * MA 02111-1307 USA 22*8d811ca3SNobuhiro Iwamatsu */ 23*8d811ca3SNobuhiro Iwamatsu 24*8d811ca3SNobuhiro Iwamatsu #include <common.h> 25*8d811ca3SNobuhiro Iwamatsu #include <asm/io.h> 26*8d811ca3SNobuhiro Iwamatsu #include <asm/arch/sys_proto.h> 27*8d811ca3SNobuhiro Iwamatsu #include <asm/gpio.h> 28*8d811ca3SNobuhiro Iwamatsu #include <netdev.h> 29*8d811ca3SNobuhiro Iwamatsu #include <i2c.h> 30*8d811ca3SNobuhiro Iwamatsu 31*8d811ca3SNobuhiro Iwamatsu DECLARE_GLOBAL_DATA_PTR; 32*8d811ca3SNobuhiro Iwamatsu 33*8d811ca3SNobuhiro Iwamatsu #define CS0BCR_D (0x06C00400) 34*8d811ca3SNobuhiro Iwamatsu #define CS4BCR_D (0x06C00400) 35*8d811ca3SNobuhiro Iwamatsu #define CS0WCR_D (0x55062C42) 36*8d811ca3SNobuhiro Iwamatsu #define CS4WCR_D (0x19051443) 37*8d811ca3SNobuhiro Iwamatsu #define CMNCR_BROMMD0 (1 << 21) 38*8d811ca3SNobuhiro Iwamatsu #define CMNCR_BROMMD1 (1 << 22) 39*8d811ca3SNobuhiro Iwamatsu #define CMNCR_BROMMD (CMNCR_BROMMD0|CMNCR_BROMMD1) 40*8d811ca3SNobuhiro Iwamatsu #define VCLKCR1_D (0x27) 41*8d811ca3SNobuhiro Iwamatsu 42*8d811ca3SNobuhiro Iwamatsu #define SMSTPCR1_CMT0 (1 << 24) 43*8d811ca3SNobuhiro Iwamatsu #define SMSTPCR1_I2C0 (1 << 16) 44*8d811ca3SNobuhiro Iwamatsu #define SMSTPCR3_USB (1 << 22) 45*8d811ca3SNobuhiro Iwamatsu 46*8d811ca3SNobuhiro Iwamatsu #define PORT32CR (0xE6051020) 47*8d811ca3SNobuhiro Iwamatsu #define PORT33CR (0xE6051021) 48*8d811ca3SNobuhiro Iwamatsu #define PORT34CR (0xE6051022) 49*8d811ca3SNobuhiro Iwamatsu #define PORT35CR (0xE6051023) 50*8d811ca3SNobuhiro Iwamatsu 51*8d811ca3SNobuhiro Iwamatsu static int cmp_loop(u32 *addr, u32 data, u32 cmp) 52*8d811ca3SNobuhiro Iwamatsu { 53*8d811ca3SNobuhiro Iwamatsu int err = -1; 54*8d811ca3SNobuhiro Iwamatsu int timeout = 100; 55*8d811ca3SNobuhiro Iwamatsu u32 value; 56*8d811ca3SNobuhiro Iwamatsu 57*8d811ca3SNobuhiro Iwamatsu while (timeout > 0) { 58*8d811ca3SNobuhiro Iwamatsu value = readl(addr); 59*8d811ca3SNobuhiro Iwamatsu if ((value & data) == cmp) { 60*8d811ca3SNobuhiro Iwamatsu err = 0; 61*8d811ca3SNobuhiro Iwamatsu break; 62*8d811ca3SNobuhiro Iwamatsu } 63*8d811ca3SNobuhiro Iwamatsu timeout--; 64*8d811ca3SNobuhiro Iwamatsu } 65*8d811ca3SNobuhiro Iwamatsu 66*8d811ca3SNobuhiro Iwamatsu return err; 67*8d811ca3SNobuhiro Iwamatsu } 68*8d811ca3SNobuhiro Iwamatsu 69*8d811ca3SNobuhiro Iwamatsu /* SBSC Init function */ 70*8d811ca3SNobuhiro Iwamatsu static void sbsc_init(struct sh73a0_sbsc *sbsc) 71*8d811ca3SNobuhiro Iwamatsu { 72*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->dllcnt0)|0x2, &sbsc->dllcnt0); 73*8d811ca3SNobuhiro Iwamatsu writel(0x5, &sbsc->sdgencnt); 74*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->sdgencnt, 0xffffffff, 0x0); 75*8d811ca3SNobuhiro Iwamatsu 76*8d811ca3SNobuhiro Iwamatsu writel(0xacc90159, &sbsc->sdcr0); 77*8d811ca3SNobuhiro Iwamatsu writel(0x00010059, &sbsc->sdcr1); 78*8d811ca3SNobuhiro Iwamatsu writel(0x50874114, &sbsc->sdwcrc0); 79*8d811ca3SNobuhiro Iwamatsu writel(0x33199b37, &sbsc->sdwcrc1); 80*8d811ca3SNobuhiro Iwamatsu writel(0x008f2313, &sbsc->sdwcrc2); 81*8d811ca3SNobuhiro Iwamatsu writel(0x31020707, &sbsc->sdwcr00); 82*8d811ca3SNobuhiro Iwamatsu writel(0x0017040a, &sbsc->sdwcr01); 83*8d811ca3SNobuhiro Iwamatsu writel(0x31020707, &sbsc->sdwcr10); 84*8d811ca3SNobuhiro Iwamatsu writel(0x0017040a, &sbsc->sdwcr11); 85*8d811ca3SNobuhiro Iwamatsu writel(0x05555555, &sbsc->sddrvcr0); 86*8d811ca3SNobuhiro Iwamatsu writel(0x30000000, &sbsc->sdwcr2); 87*8d811ca3SNobuhiro Iwamatsu 88*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->sdpcr) | 0x80, &sbsc->sdpcr); 89*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->sdpcr, 0x80, 0x80); 90*8d811ca3SNobuhiro Iwamatsu 91*8d811ca3SNobuhiro Iwamatsu writel(0x00002710, &sbsc->sdgencnt); 92*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->sdgencnt, 0xffffffff, 0x0); 93*8d811ca3SNobuhiro Iwamatsu 94*8d811ca3SNobuhiro Iwamatsu writel(0x0000003f, &sbsc->sdmracr0); 95*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1A); 96*8d811ca3SNobuhiro Iwamatsu writel(0x000001f4, &sbsc->sdgencnt); 97*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->sdgencnt, 0xffffffff, 0x0); 98*8d811ca3SNobuhiro Iwamatsu 99*8d811ca3SNobuhiro Iwamatsu writel(0x0000ff0a, &sbsc->sdmracr0); 100*8d811ca3SNobuhiro Iwamatsu if (sbsc == (struct sh73a0_sbsc *)SBSC1_BASE) 101*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA3A); 102*8d811ca3SNobuhiro Iwamatsu else 103*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA3B); 104*8d811ca3SNobuhiro Iwamatsu 105*8d811ca3SNobuhiro Iwamatsu writel(0x00000032, &sbsc->sdgencnt); 106*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->sdgencnt, 0xffffffff, 0x0); 107*8d811ca3SNobuhiro Iwamatsu 108*8d811ca3SNobuhiro Iwamatsu if (sbsc == (struct sh73a0_sbsc *)SBSC1_BASE) { 109*8d811ca3SNobuhiro Iwamatsu writel(0x00002201, &sbsc->sdmracr0); 110*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1A); 111*8d811ca3SNobuhiro Iwamatsu writel(0x00000402, &sbsc->sdmracr0); 112*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1A); 113*8d811ca3SNobuhiro Iwamatsu writel(0x00000403, &sbsc->sdmracr0); 114*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1A); 115*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA2A); 116*8d811ca3SNobuhiro Iwamatsu } else { 117*8d811ca3SNobuhiro Iwamatsu writel(0x00002201, &sbsc->sdmracr0); 118*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1B); 119*8d811ca3SNobuhiro Iwamatsu writel(0x00000402, &sbsc->sdmracr0); 120*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1B); 121*8d811ca3SNobuhiro Iwamatsu writel(0x00000403, &sbsc->sdmracr0); 122*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA1B); 123*8d811ca3SNobuhiro Iwamatsu writel(0x0, SDMRA2B); 124*8d811ca3SNobuhiro Iwamatsu } 125*8d811ca3SNobuhiro Iwamatsu 126*8d811ca3SNobuhiro Iwamatsu writel(0x88800004, &sbsc->sdmrtmpcr); 127*8d811ca3SNobuhiro Iwamatsu writel(0x00000004, &sbsc->sdmrtmpmsk); 128*8d811ca3SNobuhiro Iwamatsu writel(0xa55a0032, &sbsc->rtcor); 129*8d811ca3SNobuhiro Iwamatsu writel(0xa55a000c, &sbsc->rtcorh); 130*8d811ca3SNobuhiro Iwamatsu writel(0xa55a2048, &sbsc->rtcsr); 131*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->sdcr0)|0x800, &sbsc->sdcr0); 132*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->sdcr1)|0x400, &sbsc->sdcr1); 133*8d811ca3SNobuhiro Iwamatsu writel(0xfff20000, &sbsc->zqccr); 134*8d811ca3SNobuhiro Iwamatsu 135*8d811ca3SNobuhiro Iwamatsu /* SCBS2 only */ 136*8d811ca3SNobuhiro Iwamatsu if (sbsc == (struct sh73a0_sbsc *)SBSC2_BASE) { 137*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->sdpdcr0)|0x00030000, &sbsc->sdpdcr0); 138*8d811ca3SNobuhiro Iwamatsu writel(0xa5390000, &sbsc->dphycnt1); 139*8d811ca3SNobuhiro Iwamatsu writel(0x00001200, &sbsc->dphycnt0); 140*8d811ca3SNobuhiro Iwamatsu writel(0x07ce0000, &sbsc->dphycnt1); 141*8d811ca3SNobuhiro Iwamatsu writel(0x00001247, &sbsc->dphycnt0); 142*8d811ca3SNobuhiro Iwamatsu cmp_loop(&sbsc->dphycnt2, 0xffffffff, 0x07ce0000); 143*8d811ca3SNobuhiro Iwamatsu writel(readl(&sbsc->sdpdcr0) & 0xfffcffff, &sbsc->sdpdcr0); 144*8d811ca3SNobuhiro Iwamatsu } 145*8d811ca3SNobuhiro Iwamatsu } 146*8d811ca3SNobuhiro Iwamatsu 147*8d811ca3SNobuhiro Iwamatsu void s_init(void) 148*8d811ca3SNobuhiro Iwamatsu { 149*8d811ca3SNobuhiro Iwamatsu struct sh73a0_rwdt *rwdt = (struct sh73a0_rwdt *)RWDT_BASE; 150*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc_cpg *cpg = (struct sh73a0_sbsc_cpg *)CPG_BASE; 151*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc_cpg_srcr *cpg_srcr = 152*8d811ca3SNobuhiro Iwamatsu (struct sh73a0_sbsc_cpg_srcr *)CPG_SRCR_BASE; 153*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc *sbsc1 = (struct sh73a0_sbsc *)SBSC1_BASE; 154*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc *sbsc2 = (struct sh73a0_sbsc *)SBSC2_BASE; 155*8d811ca3SNobuhiro Iwamatsu struct sh73a0_hpb *hpb = (struct sh73a0_hpb *)HPB_BASE; 156*8d811ca3SNobuhiro Iwamatsu struct sh73a0_hpb_bscr *hpb_bscr = 157*8d811ca3SNobuhiro Iwamatsu (struct sh73a0_hpb_bscr *)HPBSCR_BASE; 158*8d811ca3SNobuhiro Iwamatsu 159*8d811ca3SNobuhiro Iwamatsu /* Watchdog init */ 160*8d811ca3SNobuhiro Iwamatsu writew(0xA507, &rwdt->rwtcsra0); 161*8d811ca3SNobuhiro Iwamatsu 162*8d811ca3SNobuhiro Iwamatsu /* Secure control register Init */ 163*8d811ca3SNobuhiro Iwamatsu #define LIFEC_SEC_SRC_BIT (1 << 15) 164*8d811ca3SNobuhiro Iwamatsu writel(readl(LIFEC_SEC_SRC) & ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC); 165*8d811ca3SNobuhiro Iwamatsu 166*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg_srcr->srcr3, (1 << 15)); 167*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg->smstpcr2, (1 << 18)); 168*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg_srcr->srcr2, (1 << 18)); 169*8d811ca3SNobuhiro Iwamatsu writel(0x0, &cpg->pllecr); 170*8d811ca3SNobuhiro Iwamatsu 171*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->pllecr, 0x00000F00, 0x0); 172*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrb, 0x80000000, 0x0); 173*8d811ca3SNobuhiro Iwamatsu 174*8d811ca3SNobuhiro Iwamatsu writel(0x2D000000, &cpg->pll0cr); 175*8d811ca3SNobuhiro Iwamatsu writel(0x17100000, &cpg->pll1cr); 176*8d811ca3SNobuhiro Iwamatsu writel(0x96235880, &cpg->frqcrb); 177*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrb, 0x80000000, 0x0); 178*8d811ca3SNobuhiro Iwamatsu 179*8d811ca3SNobuhiro Iwamatsu writel(0xB, &cpg->flckcr); 180*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg->smstpcr0, (1 << 1)); 181*8d811ca3SNobuhiro Iwamatsu 182*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg_srcr->srcr0, (1 << 1)); 183*8d811ca3SNobuhiro Iwamatsu writel(0x0514, &hpb_bscr->smgpiotime); 184*8d811ca3SNobuhiro Iwamatsu writel(0x0514, &hpb_bscr->smcmt2time); 185*8d811ca3SNobuhiro Iwamatsu writel(0x0514, &hpb_bscr->smcpgtime); 186*8d811ca3SNobuhiro Iwamatsu writel(0x0514, &hpb_bscr->smsysctime); 187*8d811ca3SNobuhiro Iwamatsu 188*8d811ca3SNobuhiro Iwamatsu writel(0x00092000, &cpg->dvfscr4); 189*8d811ca3SNobuhiro Iwamatsu writel(0x000000DC, &cpg->dvfscr5); 190*8d811ca3SNobuhiro Iwamatsu writel(0x0, &cpg->pllecr); 191*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->pllecr, 0x00000F00, 0x0); 192*8d811ca3SNobuhiro Iwamatsu 193*8d811ca3SNobuhiro Iwamatsu /* FRQCR Init */ 194*8d811ca3SNobuhiro Iwamatsu writel(0x0012453C, &cpg->frqcra); 195*8d811ca3SNobuhiro Iwamatsu writel(0x80331350, &cpg->frqcrb); 196*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrb, 0x80000000, 0x0); 197*8d811ca3SNobuhiro Iwamatsu writel(0x00000B0B, &cpg->frqcrd); 198*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrd, 0x80000000, 0x0); 199*8d811ca3SNobuhiro Iwamatsu 200*8d811ca3SNobuhiro Iwamatsu /* Clock Init */ 201*8d811ca3SNobuhiro Iwamatsu writel(0x00000003, PCLKCR); 202*8d811ca3SNobuhiro Iwamatsu writel(0x0000012F, &cpg->vclkcr1); 203*8d811ca3SNobuhiro Iwamatsu writel(0x00000119, &cpg->vclkcr2); 204*8d811ca3SNobuhiro Iwamatsu writel(0x00000119, &cpg->vclkcr3); 205*8d811ca3SNobuhiro Iwamatsu writel(0x00000002, &cpg->zbckcr); 206*8d811ca3SNobuhiro Iwamatsu writel(0x00000005, &cpg->flckcr); 207*8d811ca3SNobuhiro Iwamatsu writel(0x00000080, &cpg->sd0ckcr); 208*8d811ca3SNobuhiro Iwamatsu writel(0x00000080, &cpg->sd1ckcr); 209*8d811ca3SNobuhiro Iwamatsu writel(0x00000080, &cpg->sd2ckcr); 210*8d811ca3SNobuhiro Iwamatsu writel(0x0000003F, &cpg->fsiackcr); 211*8d811ca3SNobuhiro Iwamatsu writel(0x0000003F, &cpg->fsibckcr); 212*8d811ca3SNobuhiro Iwamatsu writel(0x00000080, &cpg->subckcr); 213*8d811ca3SNobuhiro Iwamatsu writel(0x0000000B, &cpg->spuackcr); 214*8d811ca3SNobuhiro Iwamatsu writel(0x0000000B, &cpg->spuvckcr); 215*8d811ca3SNobuhiro Iwamatsu writel(0x0000013F, &cpg->msuckcr); 216*8d811ca3SNobuhiro Iwamatsu writel(0x00000080, &cpg->hsickcr); 217*8d811ca3SNobuhiro Iwamatsu writel(0x0000003F, &cpg->mfck1cr); 218*8d811ca3SNobuhiro Iwamatsu writel(0x0000003F, &cpg->mfck2cr); 219*8d811ca3SNobuhiro Iwamatsu writel(0x00000107, &cpg->dsitckcr); 220*8d811ca3SNobuhiro Iwamatsu writel(0x00000313, &cpg->dsi0pckcr); 221*8d811ca3SNobuhiro Iwamatsu writel(0x0000130D, &cpg->dsi1pckcr); 222*8d811ca3SNobuhiro Iwamatsu writel(0x2A800E0E, &cpg->dsi0phycr); 223*8d811ca3SNobuhiro Iwamatsu writel(0x1E000000, &cpg->pll0cr); 224*8d811ca3SNobuhiro Iwamatsu writel(0x2D000000, &cpg->pll0cr); 225*8d811ca3SNobuhiro Iwamatsu writel(0x17100000, &cpg->pll1cr); 226*8d811ca3SNobuhiro Iwamatsu writel(0x27000080, &cpg->pll2cr); 227*8d811ca3SNobuhiro Iwamatsu writel(0x1D000000, &cpg->pll3cr); 228*8d811ca3SNobuhiro Iwamatsu writel(0x00080000, &cpg->pll0stpcr); 229*8d811ca3SNobuhiro Iwamatsu writel(0x000120C0, &cpg->pll1stpcr); 230*8d811ca3SNobuhiro Iwamatsu writel(0x00012000, &cpg->pll2stpcr); 231*8d811ca3SNobuhiro Iwamatsu writel(0x00000030, &cpg->pll3stpcr); 232*8d811ca3SNobuhiro Iwamatsu 233*8d811ca3SNobuhiro Iwamatsu writel(0x0000000B, &cpg->pllecr); 234*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->pllecr, 0x00000B00, 0x00000B00); 235*8d811ca3SNobuhiro Iwamatsu 236*8d811ca3SNobuhiro Iwamatsu writel(0x000120F0, &cpg->dvfscr3); 237*8d811ca3SNobuhiro Iwamatsu writel(0x00000020, &cpg->mpmode); 238*8d811ca3SNobuhiro Iwamatsu writel(0x0000028A, &cpg->vrefcr); 239*8d811ca3SNobuhiro Iwamatsu writel(0xE4628087, &cpg->rmstpcr0); 240*8d811ca3SNobuhiro Iwamatsu writel(0xFFFFFFFF, &cpg->rmstpcr1); 241*8d811ca3SNobuhiro Iwamatsu writel(0x53FFFFFF, &cpg->rmstpcr2); 242*8d811ca3SNobuhiro Iwamatsu writel(0xFFFFFFFF, &cpg->rmstpcr3); 243*8d811ca3SNobuhiro Iwamatsu writel(0x00800D3D, &cpg->rmstpcr4); 244*8d811ca3SNobuhiro Iwamatsu writel(0xFFFFF3FF, &cpg->rmstpcr5); 245*8d811ca3SNobuhiro Iwamatsu writel(0x00000000, &cpg->smstpcr2); 246*8d811ca3SNobuhiro Iwamatsu writel(0x00040000, &cpg_srcr->srcr2); 247*8d811ca3SNobuhiro Iwamatsu 248*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg->pllecr, (1 << 3)); 249*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->pllecr, 0x00000800, 0x0); 250*8d811ca3SNobuhiro Iwamatsu 251*8d811ca3SNobuhiro Iwamatsu writel(0x00000001, &hpb->hpbctrl6); 252*8d811ca3SNobuhiro Iwamatsu cmp_loop(&hpb->hpbctrl6, 0x1, 0x1); 253*8d811ca3SNobuhiro Iwamatsu 254*8d811ca3SNobuhiro Iwamatsu writel(0x00001414, &cpg->frqcrd); 255*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrd, 0x80000000, 0x0); 256*8d811ca3SNobuhiro Iwamatsu 257*8d811ca3SNobuhiro Iwamatsu writel(0x1d000000, &cpg->pll3cr); 258*8d811ca3SNobuhiro Iwamatsu setbits_le32(&cpg->pllecr, (1 << 3)); 259*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->pllecr, 0x800, 0x800); 260*8d811ca3SNobuhiro Iwamatsu 261*8d811ca3SNobuhiro Iwamatsu /* SBSC1 Init*/ 262*8d811ca3SNobuhiro Iwamatsu sbsc_init(sbsc1); 263*8d811ca3SNobuhiro Iwamatsu 264*8d811ca3SNobuhiro Iwamatsu /* SBSC2 Init*/ 265*8d811ca3SNobuhiro Iwamatsu sbsc_init(sbsc2); 266*8d811ca3SNobuhiro Iwamatsu 267*8d811ca3SNobuhiro Iwamatsu writel(0x00000b0b, &cpg->frqcrd); 268*8d811ca3SNobuhiro Iwamatsu cmp_loop(&cpg->frqcrd, 0x80000000, 0x0); 269*8d811ca3SNobuhiro Iwamatsu } 270*8d811ca3SNobuhiro Iwamatsu 271*8d811ca3SNobuhiro Iwamatsu int board_early_init_f(void) 272*8d811ca3SNobuhiro Iwamatsu { 273*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc_cpg *cpg = (struct sh73a0_sbsc_cpg *)CPG_BASE; 274*8d811ca3SNobuhiro Iwamatsu struct sh73a0_bsc *bsc = (struct sh73a0_bsc *)BSC_BASE; 275*8d811ca3SNobuhiro Iwamatsu struct sh73a0_sbsc_cpg_srcr *cpg_srcr = 276*8d811ca3SNobuhiro Iwamatsu (struct sh73a0_sbsc_cpg_srcr *)CPG_SRCR_BASE; 277*8d811ca3SNobuhiro Iwamatsu 278*8d811ca3SNobuhiro Iwamatsu writel(CS0BCR_D, &bsc->cs0bcr); 279*8d811ca3SNobuhiro Iwamatsu writel(CS4BCR_D, &bsc->cs4bcr); 280*8d811ca3SNobuhiro Iwamatsu writel(CS0WCR_D, &bsc->cs0wcr); 281*8d811ca3SNobuhiro Iwamatsu writel(CS4WCR_D, &bsc->cs4wcr); 282*8d811ca3SNobuhiro Iwamatsu 283*8d811ca3SNobuhiro Iwamatsu clrsetbits_le32(&bsc->cmncr, ~CMNCR_BROMMD, CMNCR_BROMMD); 284*8d811ca3SNobuhiro Iwamatsu 285*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg->smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0)); 286*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg_srcr->srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0)); 287*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg->smstpcr3, SMSTPCR3_USB); 288*8d811ca3SNobuhiro Iwamatsu clrbits_le32(&cpg_srcr->srcr3, SMSTPCR3_USB); 289*8d811ca3SNobuhiro Iwamatsu writel(VCLKCR1_D, &cpg->vclkcr1); 290*8d811ca3SNobuhiro Iwamatsu 291*8d811ca3SNobuhiro Iwamatsu /* Setup SCIF4 / workaround */ 292*8d811ca3SNobuhiro Iwamatsu writeb(0x12, PORT32CR); 293*8d811ca3SNobuhiro Iwamatsu writeb(0x22, PORT33CR); 294*8d811ca3SNobuhiro Iwamatsu writeb(0x12, PORT34CR); 295*8d811ca3SNobuhiro Iwamatsu writeb(0x22, PORT35CR); 296*8d811ca3SNobuhiro Iwamatsu 297*8d811ca3SNobuhiro Iwamatsu return 0; 298*8d811ca3SNobuhiro Iwamatsu } 299*8d811ca3SNobuhiro Iwamatsu 300*8d811ca3SNobuhiro Iwamatsu int board_init(void) 301*8d811ca3SNobuhiro Iwamatsu { 302*8d811ca3SNobuhiro Iwamatsu sh73a0_pinmux_init(); 303*8d811ca3SNobuhiro Iwamatsu 304*8d811ca3SNobuhiro Iwamatsu /* SCIFA 4 */ 305*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SCIFA4_TXD, NULL); 306*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SCIFA4_RXD, NULL); 307*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SCIFA4_RTS_, NULL); 308*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SCIFA4_CTS_, NULL); 309*8d811ca3SNobuhiro Iwamatsu 310*8d811ca3SNobuhiro Iwamatsu /* Ethernet/SMSC */ 311*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_PORT224, NULL); 312*8d811ca3SNobuhiro Iwamatsu gpio_direction_input(GPIO_PORT224); 313*8d811ca3SNobuhiro Iwamatsu 314*8d811ca3SNobuhiro Iwamatsu /* SMSC/USB */ 315*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_CS4_, NULL); 316*8d811ca3SNobuhiro Iwamatsu 317*8d811ca3SNobuhiro Iwamatsu /* MMCIF */ 318*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCCLK0, NULL); 319*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCCMD0_PU, NULL); 320*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_0_PU, NULL); 321*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_1_PU, NULL); 322*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_2_PU, NULL); 323*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_3_PU, NULL); 324*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_4_PU, NULL); 325*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_5_PU, NULL); 326*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_6_PU, NULL); 327*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_MMCD0_7_PU, NULL); 328*8d811ca3SNobuhiro Iwamatsu 329*8d811ca3SNobuhiro Iwamatsu /* SDHI */ 330*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHIWP0, NULL); 331*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHICD0, NULL); 332*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHICMD0, NULL); 333*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHICLK0, NULL); 334*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHID0_3, NULL); 335*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHID0_2, NULL); 336*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHID0_1, NULL); 337*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHID0_0, NULL); 338*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL); 339*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_PORT15, NULL); 340*8d811ca3SNobuhiro Iwamatsu gpio_direction_output(GPIO_PORT15, 1); 341*8d811ca3SNobuhiro Iwamatsu 342*8d811ca3SNobuhiro Iwamatsu /* I2C */ 343*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); 344*8d811ca3SNobuhiro Iwamatsu gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); 345*8d811ca3SNobuhiro Iwamatsu 346*8d811ca3SNobuhiro Iwamatsu gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); 347*8d811ca3SNobuhiro Iwamatsu 348*8d811ca3SNobuhiro Iwamatsu return 0; 349*8d811ca3SNobuhiro Iwamatsu } 350*8d811ca3SNobuhiro Iwamatsu 351*8d811ca3SNobuhiro Iwamatsu const struct rmobile_sysinfo sysinfo = { 352*8d811ca3SNobuhiro Iwamatsu CONFIG_RMOBILE_BOARD_STRING 353*8d811ca3SNobuhiro Iwamatsu }; 354*8d811ca3SNobuhiro Iwamatsu 355*8d811ca3SNobuhiro Iwamatsu int dram_init(void) 356*8d811ca3SNobuhiro Iwamatsu { 357*8d811ca3SNobuhiro Iwamatsu gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 358*8d811ca3SNobuhiro Iwamatsu return 0; 359*8d811ca3SNobuhiro Iwamatsu } 360*8d811ca3SNobuhiro Iwamatsu 361*8d811ca3SNobuhiro Iwamatsu int board_eth_init(bd_t *bis) 362*8d811ca3SNobuhiro Iwamatsu { 363*8d811ca3SNobuhiro Iwamatsu int ret = 0; 364*8d811ca3SNobuhiro Iwamatsu #ifdef CONFIG_SMC911X 365*8d811ca3SNobuhiro Iwamatsu ret = smc911x_initialize(0, CONFIG_SMC911X_BASE); 366*8d811ca3SNobuhiro Iwamatsu #endif 367*8d811ca3SNobuhiro Iwamatsu return ret; 368*8d811ca3SNobuhiro Iwamatsu } 369*8d811ca3SNobuhiro Iwamatsu 370*8d811ca3SNobuhiro Iwamatsu void reset_cpu(ulong addr) 371*8d811ca3SNobuhiro Iwamatsu { 372*8d811ca3SNobuhiro Iwamatsu } 373