1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/arch/imx-regs.h> 10 #include <asm/arch/sys_proto.h> 11 #include <asm/arch/crm_regs.h> 12 #include <asm/arch/clock.h> 13 #include <asm/arch/iomux-mx53.h> 14 #include <asm/arch/clock.h> 15 #include <asm/gpio.h> 16 #include <mmc.h> 17 #include <fsl_esdhc.h> 18 #include <power/pmic.h> 19 #include <fsl_pmic.h> 20 #include "kp_id_rev.h" 21 22 #define VBUS_PWR_EN IMX_GPIO_NR(7, 8) 23 #define PHY_nRST IMX_GPIO_NR(7, 6) 24 #define BOOSTER_OFF IMX_GPIO_NR(2, 23) 25 #define LCD_BACKLIGHT IMX_GPIO_NR(1, 1) 26 #define KEY1 IMX_GPIO_NR(2, 26) 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 int dram_init(void) 31 { 32 u32 size; 33 34 size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); 35 gd->ram_size = size; 36 37 return 0; 38 } 39 40 int dram_init_banksize(void) 41 { 42 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 43 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 44 45 return 0; 46 } 47 48 u32 get_board_rev(void) 49 { 50 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; 51 struct fuse_bank *bank = &iim->bank[0]; 52 struct fuse_bank0_regs *fuse = 53 (struct fuse_bank0_regs *)bank->fuse_regs; 54 55 int rev = readl(&fuse->gp[6]); 56 57 return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; 58 } 59 60 #ifdef CONFIG_USB_EHCI_MX5 61 int board_ehci_hcd_init(int port) 62 { 63 gpio_request(VBUS_PWR_EN, "VBUS_PWR_EN"); 64 gpio_direction_output(VBUS_PWR_EN, 1); 65 return 0; 66 } 67 #endif 68 69 #ifdef CONFIG_FSL_ESDHC 70 struct fsl_esdhc_cfg esdhc_cfg[] = { 71 {MMC_SDHC3_BASE_ADDR}, 72 }; 73 74 int board_mmc_getcd(struct mmc *mmc) 75 { 76 return 1; /* eMMC is always present */ 77 } 78 79 #define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ 80 PAD_CTL_PUS_100K_UP) 81 #define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ 82 PAD_CTL_DSE_HIGH) 83 84 int board_mmc_init(bd_t *bis) 85 { 86 int ret; 87 88 static const iomux_v3_cfg_t sd3_pads[] = { 89 NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, 90 SD_CMD_PAD_CTRL), 91 NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), 92 NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), 93 NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), 94 NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), 95 NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), 96 NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), 97 NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), 98 NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), 99 NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), 100 }; 101 102 esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); 103 imx_iomux_v3_setup_multiple_pads(sd3_pads, ARRAY_SIZE(sd3_pads)); 104 105 ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]); 106 if (ret) 107 return ret; 108 109 return 0; 110 } 111 #endif 112 113 static int power_init(void) 114 { 115 struct udevice *dev; 116 int ret; 117 118 ret = pmic_get("mc34708", &dev); 119 if (ret) { 120 printf("%s: mc34708 not found !\n", __func__); 121 return ret; 122 } 123 124 /* Set VDDGP to 1.110V for 800 MHz on SW1 */ 125 pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708, 126 SWx_1_110V_MC34708); 127 128 /* Set VCC as 1.30V on SW2 */ 129 pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708, 130 SWx_1_300V_MC34708); 131 132 /* Set global reset timer to 4s */ 133 pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708, 134 TIMER_4S_MC34708); 135 136 return ret; 137 } 138 139 static void setup_clocks(void) 140 { 141 int ret; 142 u32 ref_clk = MXC_HCLK; 143 /* 144 * CPU clock set to 800MHz and DDR to 400MHz 145 */ 146 ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK); 147 if (ret) 148 printf("CPU: Switch CPU clock to 800MHZ failed\n"); 149 150 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); 151 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); 152 if (ret) 153 printf("CPU: Switch DDR clock to 400MHz failed\n"); 154 } 155 156 static void setup_ups(void) 157 { 158 gpio_request(BOOSTER_OFF, "BOOSTER_OFF"); 159 gpio_direction_output(BOOSTER_OFF, 0); 160 } 161 162 int board_early_init_f(void) 163 { 164 return 0; 165 } 166 167 /* 168 * Do not overwrite the console 169 * Use always serial for U-Boot console 170 */ 171 int overwrite_console(void) 172 { 173 return 1; 174 } 175 176 int board_init(void) 177 { 178 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 179 180 return 0; 181 } 182 183 void eth_phy_reset(void) 184 { 185 gpio_request(PHY_nRST, "PHY_nRST"); 186 gpio_direction_output(PHY_nRST, 1); 187 udelay(50); 188 gpio_set_value(PHY_nRST, 0); 189 udelay(400); 190 gpio_set_value(PHY_nRST, 1); 191 udelay(50); 192 } 193 194 void board_disable_display(void) 195 { 196 gpio_request(LCD_BACKLIGHT, "LCD_BACKLIGHT"); 197 gpio_direction_output(LCD_BACKLIGHT, 0); 198 } 199 200 void board_misc_setup(void) 201 { 202 gpio_request(KEY1, "KEY1_GPIO"); 203 gpio_direction_input(KEY1); 204 205 if (gpio_get_value(KEY1)) 206 env_set("key1", "off"); 207 else 208 env_set("key1", "on"); 209 } 210 211 int board_late_init(void) 212 { 213 int ret = 0; 214 215 board_disable_display(); 216 setup_ups(); 217 218 if (!power_init()) 219 setup_clocks(); 220 221 ret = read_eeprom(); 222 if (ret) 223 printf("Error %d reading EEPROM content!\n", ret); 224 225 eth_phy_reset(); 226 227 show_eeprom(); 228 read_board_id(); 229 230 board_misc_setup(); 231 232 return ret; 233 } 234