177eea280SJavier Martinez Canillas /* 277eea280SJavier Martinez Canillas * (C) Copyright 2010 377eea280SJavier Martinez Canillas * ISEE 2007 SL, <www.iseebcn.com> 477eea280SJavier Martinez Canillas * 5*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 677eea280SJavier Martinez Canillas */ 777eea280SJavier Martinez Canillas #include <common.h> 877eea280SJavier Martinez Canillas #include <twl4030.h> 977eea280SJavier Martinez Canillas #include <netdev.h> 1077eea280SJavier Martinez Canillas #include <asm/gpio.h> 115bf299bcSAndreas Bießmann #include <asm/omap_gpmc.h> 1277eea280SJavier Martinez Canillas #include <asm/io.h> 1377eea280SJavier Martinez Canillas #include <asm/arch/mem.h> 1477eea280SJavier Martinez Canillas #include <asm/arch/mmc_host_def.h> 1577eea280SJavier Martinez Canillas #include <asm/arch/mux.h> 1677eea280SJavier Martinez Canillas #include <asm/arch/sys_proto.h> 1777eea280SJavier Martinez Canillas #include <asm/mach-types.h> 1877eea280SJavier Martinez Canillas #include "igep00x0.h" 1977eea280SJavier Martinez Canillas 2077eea280SJavier Martinez Canillas DECLARE_GLOBAL_DATA_PTR; 2177eea280SJavier Martinez Canillas 2277eea280SJavier Martinez Canillas #if defined(CONFIG_CMD_NET) 2377eea280SJavier Martinez Canillas /* GPMC definitions for LAN9221 chips */ 2477eea280SJavier Martinez Canillas static const u32 gpmc_lan_config[] = { 2577eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG1, 2677eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG2, 2777eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG3, 2877eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG4, 2977eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG5, 3077eea280SJavier Martinez Canillas NET_LAN9221_GPMC_CONFIG6, 3177eea280SJavier Martinez Canillas }; 3277eea280SJavier Martinez Canillas #endif 3377eea280SJavier Martinez Canillas 3477eea280SJavier Martinez Canillas /* 3577eea280SJavier Martinez Canillas * Routine: board_init 3677eea280SJavier Martinez Canillas * Description: Early hardware init. 3777eea280SJavier Martinez Canillas */ 3877eea280SJavier Martinez Canillas int board_init(void) 3977eea280SJavier Martinez Canillas { 4077eea280SJavier Martinez Canillas gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 4177eea280SJavier Martinez Canillas /* boot param addr */ 4277eea280SJavier Martinez Canillas gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 4377eea280SJavier Martinez Canillas 4477eea280SJavier Martinez Canillas return 0; 4577eea280SJavier Martinez Canillas } 4677eea280SJavier Martinez Canillas 479d4f5421SJavier Martinez Canillas #if defined(CONFIG_SHOW_BOOT_PROGRESS) && !defined(CONFIG_SPL_BUILD) 489d4f5421SJavier Martinez Canillas void show_boot_progress(int val) 499d4f5421SJavier Martinez Canillas { 509d4f5421SJavier Martinez Canillas if (val < 0) { 519d4f5421SJavier Martinez Canillas /* something went wrong */ 529d4f5421SJavier Martinez Canillas return; 539d4f5421SJavier Martinez Canillas } 549d4f5421SJavier Martinez Canillas 559d4f5421SJavier Martinez Canillas if (!gpio_request(IGEP00X0_GPIO_LED, "")) 569d4f5421SJavier Martinez Canillas gpio_direction_output(IGEP00X0_GPIO_LED, 1); 579d4f5421SJavier Martinez Canillas } 589d4f5421SJavier Martinez Canillas #endif 599d4f5421SJavier Martinez Canillas 6077eea280SJavier Martinez Canillas #ifdef CONFIG_SPL_BUILD 6177eea280SJavier Martinez Canillas /* 6277eea280SJavier Martinez Canillas * Routine: omap_rev_string 6377eea280SJavier Martinez Canillas * Description: For SPL builds output board rev 6477eea280SJavier Martinez Canillas */ 6577eea280SJavier Martinez Canillas void omap_rev_string(void) 6677eea280SJavier Martinez Canillas { 6777eea280SJavier Martinez Canillas } 6877eea280SJavier Martinez Canillas 6977eea280SJavier Martinez Canillas /* 7077eea280SJavier Martinez Canillas * Routine: get_board_mem_timings 7177eea280SJavier Martinez Canillas * Description: If we use SPL then there is no x-loader nor config header 7277eea280SJavier Martinez Canillas * so we have to setup the DDR timings ourself on both banks. 7377eea280SJavier Martinez Canillas */ 7477eea280SJavier Martinez Canillas void get_board_mem_timings(struct board_sdrc_timings *timings) 7577eea280SJavier Martinez Canillas { 7677eea280SJavier Martinez Canillas timings->mr = MICRON_V_MR_165; 7777eea280SJavier Martinez Canillas #ifdef CONFIG_BOOT_NAND 7877eea280SJavier Martinez Canillas timings->mcfg = MICRON_V_MCFG_200(256 << 20); 7977eea280SJavier Martinez Canillas timings->ctrla = MICRON_V_ACTIMA_200; 8077eea280SJavier Martinez Canillas timings->ctrlb = MICRON_V_ACTIMB_200; 8177eea280SJavier Martinez Canillas timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 8277eea280SJavier Martinez Canillas #else 8377eea280SJavier Martinez Canillas if (get_cpu_family() == CPU_OMAP34XX) { 8477eea280SJavier Martinez Canillas timings->mcfg = NUMONYX_V_MCFG_165(256 << 20); 8577eea280SJavier Martinez Canillas timings->ctrla = NUMONYX_V_ACTIMA_165; 8677eea280SJavier Martinez Canillas timings->ctrlb = NUMONYX_V_ACTIMB_165; 8777eea280SJavier Martinez Canillas timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 8877eea280SJavier Martinez Canillas 8977eea280SJavier Martinez Canillas } else { 9077eea280SJavier Martinez Canillas timings->mcfg = NUMONYX_V_MCFG_200(256 << 20); 9177eea280SJavier Martinez Canillas timings->ctrla = NUMONYX_V_ACTIMA_200; 9277eea280SJavier Martinez Canillas timings->ctrlb = NUMONYX_V_ACTIMB_200; 9377eea280SJavier Martinez Canillas timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 9477eea280SJavier Martinez Canillas } 9577eea280SJavier Martinez Canillas #endif 9677eea280SJavier Martinez Canillas } 9777eea280SJavier Martinez Canillas #endif 9877eea280SJavier Martinez Canillas 9977eea280SJavier Martinez Canillas #if defined(CONFIG_CMD_NET) 10077eea280SJavier Martinez Canillas /* 10177eea280SJavier Martinez Canillas * Routine: setup_net_chip 10277eea280SJavier Martinez Canillas * Description: Setting up the configuration GPMC registers specific to the 10377eea280SJavier Martinez Canillas * Ethernet hardware. 10477eea280SJavier Martinez Canillas */ 10577eea280SJavier Martinez Canillas static void setup_net_chip(void) 10677eea280SJavier Martinez Canillas { 10777eea280SJavier Martinez Canillas struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; 10877eea280SJavier Martinez Canillas 10977eea280SJavier Martinez Canillas enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, 11077eea280SJavier Martinez Canillas GPMC_SIZE_16M); 11177eea280SJavier Martinez Canillas 11277eea280SJavier Martinez Canillas /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ 11377eea280SJavier Martinez Canillas writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); 11477eea280SJavier Martinez Canillas /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ 11577eea280SJavier Martinez Canillas writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); 11677eea280SJavier Martinez Canillas /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ 11777eea280SJavier Martinez Canillas writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, 11877eea280SJavier Martinez Canillas &ctrl_base->gpmc_nadv_ale); 11977eea280SJavier Martinez Canillas 12077eea280SJavier Martinez Canillas /* Make GPIO 64 as output pin and send a magic pulse through it */ 12177eea280SJavier Martinez Canillas if (!gpio_request(64, "")) { 12277eea280SJavier Martinez Canillas gpio_direction_output(64, 0); 12377eea280SJavier Martinez Canillas gpio_set_value(64, 1); 12477eea280SJavier Martinez Canillas udelay(1); 12577eea280SJavier Martinez Canillas gpio_set_value(64, 0); 12677eea280SJavier Martinez Canillas udelay(1); 12777eea280SJavier Martinez Canillas gpio_set_value(64, 1); 12877eea280SJavier Martinez Canillas } 12977eea280SJavier Martinez Canillas } 13077eea280SJavier Martinez Canillas #else 13177eea280SJavier Martinez Canillas static inline void setup_net_chip(void) {} 13277eea280SJavier Martinez Canillas #endif 13377eea280SJavier Martinez Canillas 13477eea280SJavier Martinez Canillas #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 13577eea280SJavier Martinez Canillas int board_mmc_init(bd_t *bis) 13677eea280SJavier Martinez Canillas { 137e3913f56SNikita Kiryanov return omap_mmc_init(0, 0, 0, -1, -1); 13877eea280SJavier Martinez Canillas } 13977eea280SJavier Martinez Canillas #endif 14077eea280SJavier Martinez Canillas 14177eea280SJavier Martinez Canillas /* 14277eea280SJavier Martinez Canillas * Routine: misc_init_r 14377eea280SJavier Martinez Canillas * Description: Configure board specific parts 14477eea280SJavier Martinez Canillas */ 14577eea280SJavier Martinez Canillas int misc_init_r(void) 14677eea280SJavier Martinez Canillas { 14777eea280SJavier Martinez Canillas twl4030_power_init(); 14877eea280SJavier Martinez Canillas 14977eea280SJavier Martinez Canillas setup_net_chip(); 15077eea280SJavier Martinez Canillas 15177eea280SJavier Martinez Canillas dieid_num_r(); 15277eea280SJavier Martinez Canillas 15377eea280SJavier Martinez Canillas return 0; 15477eea280SJavier Martinez Canillas } 15577eea280SJavier Martinez Canillas 15677eea280SJavier Martinez Canillas /* 15777eea280SJavier Martinez Canillas * Routine: set_muxconf_regs 15877eea280SJavier Martinez Canillas * Description: Setting up the configuration Mux registers specific to the 15977eea280SJavier Martinez Canillas * hardware. Many pins need to be moved from protect to primary 16077eea280SJavier Martinez Canillas * mode. 16177eea280SJavier Martinez Canillas */ 16277eea280SJavier Martinez Canillas void set_muxconf_regs(void) 16377eea280SJavier Martinez Canillas { 16477eea280SJavier Martinez Canillas MUX_DEFAULT(); 16577eea280SJavier Martinez Canillas 16677eea280SJavier Martinez Canillas #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) 16777eea280SJavier Martinez Canillas MUX_IGEP0020(); 16877eea280SJavier Martinez Canillas #endif 16977eea280SJavier Martinez Canillas 17077eea280SJavier Martinez Canillas #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) 17177eea280SJavier Martinez Canillas MUX_IGEP0030(); 17277eea280SJavier Martinez Canillas #endif 17377eea280SJavier Martinez Canillas } 17477eea280SJavier Martinez Canillas 17577eea280SJavier Martinez Canillas #if defined(CONFIG_CMD_NET) 17677eea280SJavier Martinez Canillas int board_eth_init(bd_t *bis) 17777eea280SJavier Martinez Canillas { 17877eea280SJavier Martinez Canillas int rc = 0; 17977eea280SJavier Martinez Canillas #ifdef CONFIG_SMC911X 18077eea280SJavier Martinez Canillas rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 18177eea280SJavier Martinez Canillas #endif 18277eea280SJavier Martinez Canillas return rc; 18377eea280SJavier Martinez Canillas } 18477eea280SJavier Martinez Canillas #endif 185