1 // SPDX-License-Identifier: GPL-2.0+ 2 3 #include <common.h> 4 #include <twl4030.h> 5 #include <asm/io.h> 6 #include <asm/omap_mmc.h> 7 #include <asm/arch/mux.h> 8 #include <asm/arch/sys_proto.h> 9 #include <jffs2/load_kernel.h> 10 #include <linux/mtd/rawnand.h> 11 #include "igep00x0.h" 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 /* 16 * Routine: set_muxconf_regs 17 * Description: Setting up the configuration Mux registers specific to the 18 * hardware. Many pins need to be moved from protect to primary 19 * mode. 20 */ 21 void set_muxconf_regs(void) 22 { 23 MUX_DEFAULT(); 24 } 25 26 /* 27 * Routine: board_init 28 * Description: Early hardware init. 29 */ 30 int board_init(void) 31 { 32 int loops = 100; 33 34 /* find out flash memory type, assume NAND first */ 35 gpmc_cs0_flash = MTD_DEV_TYPE_NAND; 36 gpmc_init(); 37 38 /* Issue a RESET and then READID */ 39 writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd); 40 writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd); 41 while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY) 42 != NAND_STATUS_READY) { 43 udelay(1); 44 if (--loops == 0) { 45 gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND; 46 gpmc_init(); /* reinitialize for OneNAND */ 47 break; 48 } 49 } 50 51 /* boot param addr */ 52 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 53 54 return 0; 55 } 56 57 #if defined(CONFIG_MMC) 58 int board_mmc_init(bd_t *bis) 59 { 60 return omap_mmc_init(0, 0, 0, -1, -1); 61 } 62 63 void board_mmc_power_init(void) 64 { 65 twl4030_power_mmc_init(0); 66 } 67 #endif 68