1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 4 */ 5 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/arch/device.h> 9 #include <asm/arch/quark.h> 10 11 /* 12 * Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin. 13 * 14 * We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this 15 * pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata() 16 * in the Intel ICH6 GPIO driver where it calls PCI configuration space access 17 * APIs which will trigger PCI enumeration process. 18 * 19 * Check <asm/arch-quark/quark.h> for more details. 20 */ 21 void board_assert_perst(void) 22 { 23 u32 base, port, val; 24 25 /* retrieve the GPIO IO base */ 26 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); 27 base = (base & 0xffff) & ~0x7f; 28 29 /* enable the pin */ 30 port = base + 0x20; 31 val = inl(port); 32 val |= (1 << 0); 33 outl(val, port); 34 35 /* configure the pin as output */ 36 port = base + 0x24; 37 val = inl(port); 38 val &= ~(1 << 0); 39 outl(val, port); 40 41 /* pull it down (assert) */ 42 port = base + 0x28; 43 val = inl(port); 44 val &= ~(1 << 0); 45 outl(val, port); 46 } 47 48 void board_deassert_perst(void) 49 { 50 u32 base, port, val; 51 52 /* retrieve the GPIO IO base */ 53 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); 54 base = (base & 0xffff) & ~0x7f; 55 56 /* pull it up (de-assert) */ 57 port = base + 0x28; 58 val = inl(port); 59 val |= (1 << 0); 60 outl(val, port); 61 } 62