1 /* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/arch/device.h> 10 #include <asm/arch/quark.h> 11 12 /* 13 * Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin. 14 * 15 * We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this 16 * pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata() 17 * in the Intel ICH6 GPIO driver where it calls PCI configuration space access 18 * APIs which will trigger PCI enumeration process. 19 * 20 * Check <asm/arch-quark/quark.h> for more details. 21 */ 22 void board_assert_perst(void) 23 { 24 u32 base, port, val; 25 26 /* retrieve the GPIO IO base */ 27 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); 28 base = (base & 0xffff) & ~0x7f; 29 30 /* enable the pin */ 31 port = base + 0x20; 32 val = inl(port); 33 val |= (1 << 0); 34 outl(val, port); 35 36 /* configure the pin as output */ 37 port = base + 0x24; 38 val = inl(port); 39 val &= ~(1 << 0); 40 outl(val, port); 41 42 /* pull it down (assert) */ 43 port = base + 0x28; 44 val = inl(port); 45 val &= ~(1 << 0); 46 outl(val, port); 47 } 48 49 void board_deassert_perst(void) 50 { 51 u32 base, port, val; 52 53 /* retrieve the GPIO IO base */ 54 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); 55 base = (base & 0xffff) & ~0x7f; 56 57 /* pull it up (de-assert) */ 58 port = base + 0x28; 59 val = inl(port); 60 val |= (1 << 0); 61 outl(val, port); 62 } 63