1 /* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/arch/device.h> 10 #include <asm/arch/gpio.h> 11 #include <asm/arch/quark.h> 12 13 int board_early_init_f(void) 14 { 15 return 0; 16 } 17 18 /* 19 * Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin. 20 * 21 * We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this 22 * pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata() 23 * in the Intel ICH6 GPIO driver where it calls PCI configuration space access 24 * APIs which will trigger PCI enumeration process. 25 * 26 * Check <asm/arch-quark/quark.h> for more details. 27 */ 28 void board_assert_perst(void) 29 { 30 u32 base, port, val; 31 32 /* retrieve the GPIO IO base */ 33 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); 34 base = (base & 0xffff) & ~0x7f; 35 36 /* enable the pin */ 37 port = base + 0x20; 38 val = inl(port); 39 val |= (1 << 0); 40 outl(val, port); 41 42 /* configure the pin as output */ 43 port = base + 0x24; 44 val = inl(port); 45 val &= ~(1 << 0); 46 outl(val, port); 47 48 /* pull it down (assert) */ 49 port = base + 0x28; 50 val = inl(port); 51 val &= ~(1 << 0); 52 outl(val, port); 53 } 54 55 void board_deassert_perst(void) 56 { 57 u32 base, port, val; 58 59 /* retrieve the GPIO IO base */ 60 qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); 61 base = (base & 0xffff) & ~0x7f; 62 63 /* pull it up (de-assert) */ 64 port = base + 0x28; 65 val = inl(port); 66 val |= (1 << 0); 67 outl(val, port); 68 } 69 70 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) 71 { 72 return; 73 } 74