1*a2e3b05eSBin Meng /* 2*a2e3b05eSBin Meng * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> 3*a2e3b05eSBin Meng * 4*a2e3b05eSBin Meng * SPDX-License-Identifier: GPL-2.0+ 5*a2e3b05eSBin Meng */ 6*a2e3b05eSBin Meng 7*a2e3b05eSBin Meng #include <common.h> 8*a2e3b05eSBin Meng #include <dm.h> 9*a2e3b05eSBin Meng #include <errno.h> 10*a2e3b05eSBin Meng #include <pci.h> 11*a2e3b05eSBin Meng #include <smsc_sio1007.h> 12*a2e3b05eSBin Meng #include <asm/ibmpc.h> 13*a2e3b05eSBin Meng #include <asm/pci.h> 14*a2e3b05eSBin Meng #include <asm/arch/pch.h> 15*a2e3b05eSBin Meng 16*a2e3b05eSBin Meng #define SIO1007_RUNTIME_IOPORT 0x180 17*a2e3b05eSBin Meng 18*a2e3b05eSBin Meng int board_early_init_f(void) 19*a2e3b05eSBin Meng { 20*a2e3b05eSBin Meng struct udevice *pch; 21*a2e3b05eSBin Meng int ret; 22*a2e3b05eSBin Meng 23*a2e3b05eSBin Meng ret = uclass_first_device(UCLASS_PCH, &pch); 24*a2e3b05eSBin Meng if (ret) 25*a2e3b05eSBin Meng return ret; 26*a2e3b05eSBin Meng if (!pch) 27*a2e3b05eSBin Meng return -ENODEV; 28*a2e3b05eSBin Meng 29*a2e3b05eSBin Meng /* Initialize LPC interface to turn on superio chipset decode range */ 30*a2e3b05eSBin Meng dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE); 31*a2e3b05eSBin Meng dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN); 32*a2e3b05eSBin Meng dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B | 33*a2e3b05eSBin Meng (SIO1007_IOPORT3 & 0xff00) | GEN_DEC_RANGE_EN); 34*a2e3b05eSBin Meng dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B | 35*a2e3b05eSBin Meng SIO1007_RUNTIME_IOPORT | GEN_DEC_RANGE_EN); 36*a2e3b05eSBin Meng 37*a2e3b05eSBin Meng /* Enable legacy serial port at 0x3f8 */ 38*a2e3b05eSBin Meng sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ); 39*a2e3b05eSBin Meng 40*a2e3b05eSBin Meng /* Enable SIO1007 runtime I/O port at 0x180 */ 41*a2e3b05eSBin Meng sio1007_enable_runtime(SIO1007_IOPORT3, SIO1007_RUNTIME_IOPORT); 42*a2e3b05eSBin Meng 43*a2e3b05eSBin Meng /* 44*a2e3b05eSBin Meng * On Cougar Canyon 2 board, the RS232 transiver connected to serial 45*a2e3b05eSBin Meng * port 0 (0x3f8) is controlled by a GPIO pin (GPIO10) on the SIO1007. 46*a2e3b05eSBin Meng * Set the pin value to 1 to enable the RS232 transiver. 47*a2e3b05eSBin Meng */ 48*a2e3b05eSBin Meng sio1007_gpio_config(SIO1007_IOPORT3, 0, GPIO_DIR_OUTPUT, 49*a2e3b05eSBin Meng GPIO_POL_NO_INVERT, GPIO_TYPE_PUSH_PULL); 50*a2e3b05eSBin Meng sio1007_gpio_set_value(SIO1007_RUNTIME_IOPORT, 0, 1); 51*a2e3b05eSBin Meng 52*a2e3b05eSBin Meng return 0; 53*a2e3b05eSBin Meng } 54*a2e3b05eSBin Meng 55*a2e3b05eSBin Meng void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) 56*a2e3b05eSBin Meng { 57*a2e3b05eSBin Meng return; 58*a2e3b05eSBin Meng } 59