1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 2ad8783cbSPaul Burton /* 3ad8783cbSPaul Burton * Copyright (C) 2016 Imagination Technologies 4ad8783cbSPaul Burton */ 5ad8783cbSPaul Burton 6ad8783cbSPaul Burton #ifndef __BOARD_BOSTON_REGS_H__ 7ad8783cbSPaul Burton #define __BOARD_BOSTON_REGS_H__ 8ad8783cbSPaul Burton 9ad8783cbSPaul Burton #include <asm/addrspace.h> 10ad8783cbSPaul Burton 11ad8783cbSPaul Burton #define BOSTON_PLAT_BASE CKSEG1ADDR(0x17ffd000) 12ad8783cbSPaul Burton #define BOSTON_LCD_BASE CKSEG1ADDR(0x17fff000) 13ad8783cbSPaul Burton 14ad8783cbSPaul Burton /* 15ad8783cbSPaul Burton * Platform Register Definitions 16ad8783cbSPaul Burton */ 17ad8783cbSPaul Burton #define BOSTON_PLAT_CORE_CL (BOSTON_PLAT_BASE + 0x04) 18ad8783cbSPaul Burton 19ad8783cbSPaul Burton #define BOSTON_PLAT_DDR3STAT (BOSTON_PLAT_BASE + 0x14) 20ad8783cbSPaul Burton # define BOSTON_PLAT_DDR3STAT_CALIB (1 << 2) 21ad8783cbSPaul Burton 22ad8783cbSPaul Burton #define BOSTON_PLAT_DDRCONF0 (BOSTON_PLAT_BASE + 0x38) 23ad8783cbSPaul Burton # define BOSTON_PLAT_DDRCONF0_SIZE (0xf << 0) 24ad8783cbSPaul Burton 25ad8783cbSPaul Burton #endif /* __BOARD_BOSTON_REGS_H__ */ 26