1*ad8783cbSPaul Burton /* 2*ad8783cbSPaul Burton * Copyright (C) 2016 Imagination Technologies 3*ad8783cbSPaul Burton * 4*ad8783cbSPaul Burton * SPDX-License-Identifier: GPL-2.0 5*ad8783cbSPaul Burton */ 6*ad8783cbSPaul Burton 7*ad8783cbSPaul Burton #ifndef __BOARD_BOSTON_REGS_H__ 8*ad8783cbSPaul Burton #define __BOARD_BOSTON_REGS_H__ 9*ad8783cbSPaul Burton 10*ad8783cbSPaul Burton #include <asm/addrspace.h> 11*ad8783cbSPaul Burton 12*ad8783cbSPaul Burton #define BOSTON_PLAT_BASE CKSEG1ADDR(0x17ffd000) 13*ad8783cbSPaul Burton #define BOSTON_LCD_BASE CKSEG1ADDR(0x17fff000) 14*ad8783cbSPaul Burton 15*ad8783cbSPaul Burton /* 16*ad8783cbSPaul Burton * Platform Register Definitions 17*ad8783cbSPaul Burton */ 18*ad8783cbSPaul Burton #define BOSTON_PLAT_CORE_CL (BOSTON_PLAT_BASE + 0x04) 19*ad8783cbSPaul Burton 20*ad8783cbSPaul Burton #define BOSTON_PLAT_DDR3STAT (BOSTON_PLAT_BASE + 0x14) 21*ad8783cbSPaul Burton # define BOSTON_PLAT_DDR3STAT_CALIB (1 << 2) 22*ad8783cbSPaul Burton 23*ad8783cbSPaul Burton #define BOSTON_PLAT_DDRCONF0 (BOSTON_PLAT_BASE + 0x38) 24*ad8783cbSPaul Burton # define BOSTON_PLAT_DDRCONF0_SIZE (0xf << 0) 25*ad8783cbSPaul Burton 26*ad8783cbSPaul Burton #endif /* __BOARD_BOSTON_REGS_H__ */ 27