xref: /openbmc/u-boot/board/htkw/mcx/mcx.c (revision bcc05c7a)
1 /*
2  * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3  *
4  * Based on ti/evm/evm.c
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <asm/io.h>
11 #include <asm/arch/mem.h>
12 #include <asm/arch/mmc_host_def.h>
13 #include <asm/arch/mux.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/mach-types.h>
16 #include <asm/gpio.h>
17 #include <asm/omap_gpio.h>
18 #include <asm/arch/dss.h>
19 #include <asm/arch/clock.h>
20 #include "errno.h"
21 #include <i2c.h>
22 #ifdef CONFIG_USB_EHCI
23 #include <usb.h>
24 #include <asm/ehci-omap.h>
25 #endif
26 #include "mcx.h"
27 
28 DECLARE_GLOBAL_DATA_PTR;
29 
30 #define HOT_WATER_BUTTON	42
31 #define LCD_OUTPUT		55
32 
33 /* Address of the framebuffer in RAM. */
34 #define FB_START_ADDRESS 0x88000000
35 
36 #ifdef CONFIG_USB_EHCI
37 static struct omap_usbhs_board_data usbhs_bdata = {
38 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
39 	.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
40 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
41 };
42 
43 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
44 {
45 	return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
46 }
47 
48 int ehci_hcd_stop(int index)
49 {
50 	return omap_ehci_hcd_stop();
51 }
52 #endif
53 
54 /*
55  * Routine: board_init
56  * Description: Early hardware init.
57  */
58 int board_init(void)
59 {
60 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
61 	/* boot param addr */
62 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
63 
64 	gpio_direction_output(LCD_OUTPUT, 0);
65 
66 	return 0;
67 }
68 
69 #ifdef CONFIG_BOARD_LATE_INIT
70 int board_late_init(void)
71 {
72 	if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
73 		puts("Failed to get hot-water-button pin\n");
74 		return -ENODEV;
75 	}
76 	gpio_direction_input(HOT_WATER_BUTTON);
77 
78 	/*
79 	 * if hot-water-button is pressed
80 	 * change bootcmd
81 	 */
82 	if (gpio_get_value(HOT_WATER_BUTTON))
83 		return 0;
84 
85 	setenv("bootcmd", "run swupdate");
86 
87 	return 0;
88 }
89 #endif
90 
91 /*
92  * Routine: set_muxconf_regs
93  * Description: Setting up the configuration Mux registers specific to the
94  *		hardware. Many pins need to be moved from protect to primary
95  *		mode.
96  */
97 void set_muxconf_regs(void)
98 {
99 	MUX_MCX();
100 }
101 
102 #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
103 int board_mmc_init(bd_t *bis)
104 {
105 	return omap_mmc_init(0, 0, 0, -1, -1);
106 }
107 #endif
108 
109 #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
110 
111 static struct panel_config lcd_cfg = {
112 	.timing_h       = PANEL_TIMING_H(40, 40, 48),
113 	.timing_v       = PANEL_TIMING_V(29, 13, 3),
114 	.pol_freq       = 0x00003000, /* Pol Freq */
115 	.divisor        = 0x0001000E,
116 	.panel_type     = 0x01, /* TFT */
117 	.data_lines     = 0x03, /* 24 Bit RGB */
118 	.load_mode      = 0x02, /* Frame Mode */
119 	.panel_color	= 0,
120 	.lcd_size	= PANEL_LCD_SIZE(800, 480),
121 	.gfx_format	= GFXFORMAT_RGB24_UNPACKED,
122 };
123 
124 int board_video_init(void)
125 {
126 	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
127 	void *fb;
128 
129 	fb = (void *)FB_START_ADDRESS;
130 
131 	lcd_cfg.frame_buffer = fb;
132 
133 	setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
134 	setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
135 
136 	omap3_dss_panel_config(&lcd_cfg);
137 	omap3_dss_enable();
138 
139 	return 0;
140 }
141 #endif
142