xref: /openbmc/u-boot/board/htkw/mcx/mcx.c (revision b28c5fcc)
1 /*
2  * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3  *
4  * Based on ti/evm/evm.c
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <asm/io.h>
11 #include <asm/arch/mem.h>
12 #include <asm/arch/mmc_host_def.h>
13 #include <asm/arch/mux.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/mach-types.h>
16 #include <asm/gpio.h>
17 #include <asm/omap_gpio.h>
18 #include <asm/arch/dss.h>
19 #include <asm/arch/clock.h>
20 #include <errno.h>
21 #include <i2c.h>
22 #ifdef CONFIG_USB_EHCI
23 #include <usb.h>
24 #include <asm/ehci-omap.h>
25 #endif
26 #include "mcx.h"
27 
28 DECLARE_GLOBAL_DATA_PTR;
29 
30 #define HOT_WATER_BUTTON	42
31 #define LCD_OUTPUT		55
32 
33 /* Address of the framebuffer in RAM. */
34 #define FB_START_ADDRESS 0x88000000
35 
36 #ifdef CONFIG_USB_EHCI
37 static struct omap_usbhs_board_data usbhs_bdata = {
38 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
39 	.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
40 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
41 };
42 
43 int ehci_hcd_init(int index, enum usb_init_type init,
44 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
45 {
46 	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
47 }
48 
49 int ehci_hcd_stop(int index)
50 {
51 	return omap_ehci_hcd_stop();
52 }
53 #endif
54 
55 /*
56  * Routine: board_init
57  * Description: Early hardware init.
58  */
59 int board_init(void)
60 {
61 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
62 	/* boot param addr */
63 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
64 
65 	gpio_direction_output(LCD_OUTPUT, 0);
66 
67 	return 0;
68 }
69 
70 #ifdef CONFIG_BOARD_LATE_INIT
71 int board_late_init(void)
72 {
73 	if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
74 		puts("Failed to get hot-water-button pin\n");
75 		return -ENODEV;
76 	}
77 	gpio_direction_input(HOT_WATER_BUTTON);
78 
79 	/*
80 	 * if hot-water-button is pressed
81 	 * change bootcmd
82 	 */
83 	if (gpio_get_value(HOT_WATER_BUTTON))
84 		return 0;
85 
86 	setenv("bootcmd", "run swupdate");
87 
88 	return 0;
89 }
90 #endif
91 
92 /*
93  * Routine: set_muxconf_regs
94  * Description: Setting up the configuration Mux registers specific to the
95  *		hardware. Many pins need to be moved from protect to primary
96  *		mode.
97  */
98 void set_muxconf_regs(void)
99 {
100 	MUX_MCX();
101 }
102 
103 #if defined(CONFIG_MMC_OMAP_HS)
104 int board_mmc_init(bd_t *bis)
105 {
106 	return omap_mmc_init(0, 0, 0, -1, -1);
107 }
108 #endif
109 
110 #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
111 
112 static struct panel_config lcd_cfg = {
113 	.timing_h       = PANEL_TIMING_H(40, 40, 48),
114 	.timing_v       = PANEL_TIMING_V(29, 13, 3),
115 	.pol_freq       = 0x00003000, /* Pol Freq */
116 	.divisor        = 0x0001000E,
117 	.panel_type     = 0x01, /* TFT */
118 	.data_lines     = 0x03, /* 24 Bit RGB */
119 	.load_mode      = 0x02, /* Frame Mode */
120 	.panel_color	= 0,
121 	.lcd_size	= PANEL_LCD_SIZE(800, 480),
122 	.gfx_format	= GFXFORMAT_RGB24_UNPACKED,
123 };
124 
125 int board_video_init(void)
126 {
127 	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
128 	void *fb;
129 
130 	fb = (void *)FB_START_ADDRESS;
131 
132 	lcd_cfg.frame_buffer = fb;
133 
134 	setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
135 	setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
136 
137 	omap3_dss_panel_config(&lcd_cfg);
138 	omap3_dss_enable();
139 
140 	return 0;
141 }
142 #endif
143