1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2017 Linaro 4 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> 5 */ 6 7 #include <dm.h> 8 #include <common.h> 9 #include <asm/io.h> 10 #include <dm/platform_data/serial_pl01x.h> 11 #include <asm/arch/hi3798cv200.h> 12 #include <asm/armv8/mmu.h> 13 14 DECLARE_GLOBAL_DATA_PTR; 15 16 static struct mm_region poplar_mem_map[] = { 17 { 18 .virt = 0x0UL, 19 .phys = 0x0UL, 20 .size = 0x80000000UL, 21 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 22 PTE_BLOCK_INNER_SHARE 23 }, { 24 .virt = 0x80000000UL, 25 .phys = 0x80000000UL, 26 .size = 0x80000000UL, 27 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 28 PTE_BLOCK_NON_SHARE | 29 PTE_BLOCK_PXN | PTE_BLOCK_UXN 30 }, { 31 0, 32 } 33 }; 34 35 struct mm_region *mem_map = poplar_mem_map; 36 37 #if !CONFIG_IS_ENABLED(OF_CONTROL) 38 static const struct pl01x_serial_platdata serial_platdata = { 39 .base = REG_BASE_UART0, 40 .type = TYPE_PL010, 41 .clock = 75000000, 42 }; 43 44 U_BOOT_DEVICE(poplar_serial) = { 45 .name = "serial_pl01x", 46 .platdata = &serial_platdata, 47 }; 48 #endif 49 50 int checkboard(void) 51 { 52 puts("BOARD: Hisilicon HI3798cv200 Poplar\n"); 53 54 return 0; 55 } 56 57 void reset_cpu(ulong addr) 58 { 59 psci_system_reset(); 60 } 61 62 int dram_init(void) 63 { 64 gd->ram_size = get_ram_size(NULL, 0x80000000); 65 66 return 0; 67 } 68 69 /* 70 * Some linux kernel versions don't use memory before its load address, so to 71 * be generic we just pretend it isn't there. In previous uboot versions we 72 * carved the space used by BL31 (runs in DDR on this platfomr) so the PSCI code 73 * could persist in memory and be left alone by the kernel. 74 * 75 * That led to a problem when mapping memory in older kernels. That PSCI code 76 * now lies in memory below the kernel load offset; it therefore won't be 77 * touched by the kernel, and by not specially reserving it we avoid the mapping 78 * problem as well. 79 * 80 */ 81 #define KERNEL_TEXT_OFFSET 0x00080000 82 83 int dram_init_banksize(void) 84 { 85 gd->bd->bi_dram[0].start = KERNEL_TEXT_OFFSET; 86 gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start; 87 88 return 0; 89 } 90 91 static void usb2_phy_config(void) 92 { 93 const u32 config[] = { 94 /* close EOP pre-emphasis. open data pre-emphasis */ 95 0xa1001c, 96 /* Rcomp = 150mW, increase DC level */ 97 0xa00607, 98 /* keep Rcomp working */ 99 0xa10700, 100 /* Icomp = 212mW, increase current drive */ 101 0xa00aab, 102 /* EMI fix: rx_active not stay 1 when error packets received */ 103 0xa11140, 104 /* Comp mode select */ 105 0xa11041, 106 /* adjust eye diagram */ 107 0xa0098c, 108 /* adjust eye diagram */ 109 0xa10a0a, 110 }; 111 int i; 112 113 for (i = 0; i < ARRAY_SIZE(config); i++) { 114 writel(config[i], PERI_CTRL_USB0); 115 clrsetbits_le32(PERI_CTRL_USB0, BIT(21), BIT(20) | BIT(22)); 116 udelay(20); 117 } 118 } 119 120 static void usb2_phy_init(void) 121 { 122 /* reset usb2 controller bus/utmi/roothub */ 123 setbits_le32(PERI_CRG46, USB2_BUS_SRST_REQ | USB2_UTMI0_SRST_REQ | 124 USB2_HST_PHY_SYST_REQ | USB2_OTG_PHY_SYST_REQ); 125 udelay(200); 126 127 /* reset usb2 phy por/utmi */ 128 setbits_le32(PERI_CRG47, USB2_PHY01_SRST_REQ | USB2_PHY01_SRST_TREQ1); 129 udelay(200); 130 131 /* open usb2 ref clk */ 132 setbits_le32(PERI_CRG47, USB2_PHY01_REF_CKEN); 133 udelay(300); 134 135 /* cancel usb2 power on reset */ 136 clrbits_le32(PERI_CRG47, USB2_PHY01_SRST_REQ); 137 udelay(500); 138 139 usb2_phy_config(); 140 141 /* cancel usb2 port reset, wait comp circuit stable */ 142 clrbits_le32(PERI_CRG47, USB2_PHY01_SRST_TREQ1); 143 mdelay(10); 144 145 /* open usb2 controller clk */ 146 setbits_le32(PERI_CRG46, USB2_BUS_CKEN | USB2_OHCI48M_CKEN | 147 USB2_OHCI12M_CKEN | USB2_OTG_UTMI_CKEN | 148 USB2_HST_PHY_CKEN | USB2_UTMI0_CKEN); 149 udelay(200); 150 151 /* cancel usb2 control reset */ 152 clrbits_le32(PERI_CRG46, USB2_BUS_SRST_REQ | USB2_UTMI0_SRST_REQ | 153 USB2_HST_PHY_SYST_REQ | USB2_OTG_PHY_SYST_REQ); 154 udelay(200); 155 } 156 157 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 158 #include <usb.h> 159 #include <usb/dwc2_udc.h> 160 #include <g_dnl.h> 161 162 static struct dwc2_plat_otg_data poplar_otg_data = { 163 .regs_otg = HIOTG_BASE_ADDR 164 }; 165 166 static void set_usb_to_device(void) 167 { 168 setbits_le32(PERI_CTRL_USB3, USB2_2P_CHIPID); 169 } 170 171 int board_usb_init(int index, enum usb_init_type init) 172 { 173 set_usb_to_device(); 174 return dwc2_udc_probe(&poplar_otg_data); 175 } 176 177 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) 178 { 179 if (!env_get("serial#")) 180 g_dnl_set_serialnumber("0123456789POPLAR"); 181 return 0; 182 } 183 #endif 184 185 int board_init(void) 186 { 187 usb2_phy_init(); 188 189 return 0; 190 } 191 192