xref: /openbmc/u-boot/board/highbank/highbank.c (revision 5d6050fd)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <ahci.h>
9 #include <netdev.h>
10 #include <scsi.h>
11 
12 #include <linux/sizes.h>
13 #include <asm/io.h>
14 
15 #define HB_AHCI_BASE			0xffe08000
16 
17 #define HB_SREG_A9_PWR_REQ		0xfff3cf00
18 #define HB_SREG_A9_BOOT_SRC_STAT	0xfff3cf04
19 #define HB_SREG_A9_PWRDOM_STAT		0xfff3cf20
20 
21 #define HB_PWR_SUSPEND			0
22 #define HB_PWR_SOFT_RESET		1
23 #define HB_PWR_HARD_RESET		2
24 #define HB_PWR_SHUTDOWN			3
25 
26 #define PWRDOM_STAT_SATA		0x80000000
27 #define PWRDOM_STAT_PCI			0x40000000
28 #define PWRDOM_STAT_EMMC		0x20000000
29 
30 DECLARE_GLOBAL_DATA_PTR;
31 
32 /*
33  * Miscellaneous platform dependent initialisations
34  */
35 int board_init(void)
36 {
37 	icache_enable();
38 
39 	return 0;
40 }
41 
42 /* We know all the init functions have been run now */
43 int board_eth_init(bd_t *bis)
44 {
45 	int rc = 0;
46 
47 #ifdef CONFIG_CALXEDA_XGMAC
48 	rc += calxedaxgmac_initialize(0, 0xfff50000);
49 	rc += calxedaxgmac_initialize(1, 0xfff51000);
50 #endif
51 	return rc;
52 }
53 
54 #ifdef CONFIG_SCSI_AHCI_PLAT
55 void scsi_init(void)
56 {
57 	u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
58 
59 	if (reg & PWRDOM_STAT_SATA) {
60 		ahci_init(HB_AHCI_BASE);
61 		scsi_scan(1);
62 	}
63 }
64 #endif
65 
66 #ifdef CONFIG_MISC_INIT_R
67 int misc_init_r(void)
68 {
69 	char envbuffer[16];
70 	u32 boot_choice;
71 
72 	boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
73 	sprintf(envbuffer, "bootcmd%d", boot_choice);
74 	if (getenv(envbuffer)) {
75 		sprintf(envbuffer, "run bootcmd%d", boot_choice);
76 		setenv("bootcmd", envbuffer);
77 	} else
78 		setenv("bootcmd", "");
79 
80 	return 0;
81 }
82 #endif
83 
84 int dram_init(void)
85 {
86 	gd->ram_size = SZ_512M;
87 	return 0;
88 }
89 
90 void dram_init_banksize(void)
91 {
92 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
93 	gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
94 }
95 
96 #if defined(CONFIG_OF_BOARD_SETUP)
97 int ft_board_setup(void *fdt, bd_t *bd)
98 {
99 	static const char disabled[] = "disabled";
100 	u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
101 
102 	if (!(reg & PWRDOM_STAT_SATA))
103 		do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
104 			disabled, sizeof(disabled), 1);
105 
106 	if (!(reg & PWRDOM_STAT_EMMC))
107 		do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
108 			disabled, sizeof(disabled), 1);
109 
110 	return 0;
111 }
112 #endif
113 
114 void reset_cpu(ulong addr)
115 {
116 	writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
117 
118 	wfi();
119 }
120