1*a3f9d6c7SDirk Eibach /* 2*a3f9d6c7SDirk Eibach * (C) Copyright 2014 3*a3f9d6c7SDirk Eibach * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc 4*a3f9d6c7SDirk Eibach * 5*a3f9d6c7SDirk Eibach * SPDX-License-Identifier: GPL-2.0+ 6*a3f9d6c7SDirk Eibach */ 7*a3f9d6c7SDirk Eibach 8*a3f9d6c7SDirk Eibach #ifndef _IOEP_FPGA_H_ 9*a3f9d6c7SDirk Eibach #define _IOEP_FPGA_H_ 10*a3f9d6c7SDirk Eibach 11*a3f9d6c7SDirk Eibach void ioep_fpga_print_info(unsigned int fpga); 12*a3f9d6c7SDirk Eibach bool ioep_fpga_has_osd(unsigned int fpga); 13*a3f9d6c7SDirk Eibach 14*a3f9d6c7SDirk Eibach #endif 15