1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2013 Gateworks Corporation 4 * 5 * Author: Tim Harvey <tharvey@gateworks.com> 6 */ 7 8 #ifndef __ASSEMBLY__ 9 10 /* i2c slave addresses */ 11 #define GSC_SC_ADDR 0x20 12 #define GSC_RTC_ADDR 0x68 13 #define GSC_HWMON_ADDR 0x29 14 #define GSC_EEPROM_ADDR 0x51 15 16 /* System Controller registers */ 17 enum { 18 GSC_SC_CTRL0 = 0x00, 19 GSC_SC_CTRL1 = 0x01, 20 GSC_SC_STATUS = 0x0a, 21 GSC_SC_FWCRC = 0x0c, 22 GSC_SC_FWVER = 0x0e, 23 }; 24 25 /* System Controller Control1 bits */ 26 enum { 27 GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */ 28 GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */ 29 GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */ 30 }; 31 32 /* System Controller Interrupt bits */ 33 enum { 34 GSC_SC_IRQ_PB = 0, /* Pushbutton switch */ 35 GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */ 36 GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */ 37 GSC_SC_IRQ_GPIO = 4, /* GPIO change */ 38 GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */ 39 GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */ 40 GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */ 41 }; 42 43 /* Hardware Monitor registers */ 44 enum { 45 GSC_HWMON_TEMP = 0x00, 46 GSC_HWMON_VIN = 0x02, 47 GSC_HWMON_VDD_3P3 = 0x05, 48 GSC_HWMON_VBATT = 0x08, 49 GSC_HWMON_VDD_5P0 = 0x0b, 50 GSC_HWMON_VDD_CORE = 0x0e, 51 GSC_HWMON_VDD_SOC = 0x11, 52 GSC_HWMON_VDD_HIGH = 0x14, 53 GSC_HWMON_VDD_DDR = 0x17, 54 GSC_HWMON_VDD_EXT = 0x1a, 55 GSC_HWMON_VDD_1P8 = 0x1d, 56 GSC_HWMON_VDD_IO2 = 0x20, 57 GSC_HWMON_VDD_2P5 = 0x23, 58 GSC_HWMON_VDD_IO3 = 0x26, 59 GSC_HWMON_VDD_IO4 = 0x29, 60 }; 61 62 /* 63 * I2C transactions to the GSC are done via these functions which 64 * perform retries in the case of a busy GSC NAK'ing the transaction 65 */ 66 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len); 67 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len); 68 int gsc_info(int verbose); 69 int gsc_boot_wd_disable(void); 70 #endif 71 72