1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2013 Gateworks Corporation
4  *
5  * Author: Tim Harvey <tharvey@gateworks.com>
6  */
7 
8 #include <linux/errno.h>
9 #include <common.h>
10 #include <i2c.h>
11 #include <linux/ctype.h>
12 
13 #include "ventana_eeprom.h"
14 #include "gsc.h"
15 
16 /*
17  * The Gateworks System Controller will fail to ACK a master transaction if
18  * it is busy, which can occur during its 1HZ timer tick while reading ADC's.
19  * When this does occur, it will never be busy long enough to fail more than
20  * 2 back-to-back transfers.  Thus we wrap i2c_read and i2c_write with
21  * 3 retries.
22  */
23 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
24 {
25 	int retry = 3;
26 	int n = 0;
27 	int ret;
28 
29 	while (n++ < retry) {
30 		ret = i2c_read(chip, addr, alen, buf, len);
31 		if (!ret)
32 			break;
33 		debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
34 		      n, ret);
35 		if (ret != -ENODEV)
36 			break;
37 		mdelay(10);
38 	}
39 	return ret;
40 }
41 
42 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
43 {
44 	int retry = 3;
45 	int n = 0;
46 	int ret;
47 
48 	while (n++ < retry) {
49 		ret = i2c_write(chip, addr, alen, buf, len);
50 		if (!ret)
51 			break;
52 		debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
53 		      n, ret);
54 		if (ret != -ENODEV)
55 			break;
56 		mdelay(10);
57 	}
58 	mdelay(100);
59 	return ret;
60 }
61 
62 static void read_hwmon(const char *name, uint reg, uint size)
63 {
64 	unsigned char buf[3];
65 	uint ui;
66 
67 	printf("%-8s:", name);
68 	memset(buf, 0, sizeof(buf));
69 	if (gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, size)) {
70 		puts("fRD\n");
71 	} else {
72 		ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
73 		if (size == 2 && ui > 0x8000)
74 			ui -= 0xffff;
75 		if (ui == 0xffffff)
76 			puts("invalid\n");
77 		else
78 			printf("%d\n", ui);
79 	}
80 }
81 
82 int gsc_info(int verbose)
83 {
84 	unsigned char buf[16];
85 
86 	i2c_set_bus_num(0);
87 	if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
88 		return CMD_RET_FAILURE;
89 
90 	printf("GSC:   v%d", buf[GSC_SC_FWVER]);
91 	printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
92 	printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
93 		? "en" : "dis");
94 	if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
95 		buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
96 		puts(" WDT_RESET");
97 		gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
98 			      &buf[GSC_SC_STATUS], 1);
99 	}
100 	if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) {
101 		int ui = buf[0] | buf[1]<<8;
102 		if (ui > 0x8000)
103 			ui -= 0xffff;
104 		printf(" board temp at %dC", ui / 10);
105 	}
106 	puts("\n");
107 	if (!verbose)
108 		return CMD_RET_SUCCESS;
109 
110 	read_hwmon("Temp",     GSC_HWMON_TEMP, 2);
111 	read_hwmon("VIN",      GSC_HWMON_VIN, 3);
112 	read_hwmon("VBATT",    GSC_HWMON_VBATT, 3);
113 	read_hwmon("VDD_3P3",  GSC_HWMON_VDD_3P3, 3);
114 	read_hwmon("VDD_ARM",  GSC_HWMON_VDD_CORE, 3);
115 	read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
116 	read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
117 	read_hwmon("VDD_DDR",  GSC_HWMON_VDD_DDR, 3);
118 	read_hwmon("VDD_5P0",  GSC_HWMON_VDD_5P0, 3);
119 	if (strncasecmp((const char*) ventana_info.model, "GW553", 5))
120 		read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
121 	read_hwmon("VDD_1P8",  GSC_HWMON_VDD_1P8, 3);
122 	read_hwmon("VDD_IO2",  GSC_HWMON_VDD_IO2, 3);
123 	switch (ventana_info.model[3]) {
124 	case '1': /* GW51xx */
125 		read_hwmon("VDD_IO3",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
126 		break;
127 	case '2': /* GW52xx */
128 		break;
129 	case '3': /* GW53xx */
130 		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
131 		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
132 		break;
133 	case '4': /* GW54xx */
134 		read_hwmon("VDD_IO3",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
135 		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
136 		break;
137 	case '5': /* GW55xx */
138 		break;
139 	case '6': /* GW560x */
140 		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3);
141 		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
142 		break;
143 	case '9': /* GW590x */
144 		read_hwmon("AMONBMON",  GSC_HWMON_VDD_IO3, 3);
145 		read_hwmon("BAT_VOLT",  GSC_HWMON_VDD_EXT, 3);
146 		read_hwmon("BAT_TEMP",  GSC_HWMON_VDD_IO4, 2);
147 	}
148 	return 0;
149 }
150 
151 /*
152  *  The Gateworks System Controller implements a boot
153  *  watchdog (always enabled) as a workaround for IMX6 boot related
154  *  errata such as:
155  *    ERR005768 - no fix scheduled
156  *    ERR006282 - fixed in silicon r1.2
157  *    ERR007117 - fixed in silicon r1.3
158  *    ERR007220 - fixed in silicon r1.3
159  *    ERR007926 - no fix scheduled
160  *  see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf
161  *
162  * Disable the boot watchdog
163  */
164 int gsc_boot_wd_disable(void)
165 {
166 	u8 reg;
167 
168 	i2c_set_bus_num(CONFIG_I2C_GSC);
169 	if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) {
170 		reg |= (1 << GSC_SC_CTRL1_WDDIS);
171 		if (!gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
172 			return 0;
173 	}
174 	puts("Error: could not disable GSC Watchdog\n");
175 	return 1;
176 }
177 
178 #if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD)
179 static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc,
180 			char * const argv[])
181 {
182 	unsigned char reg;
183 	unsigned long secs = 0;
184 
185 	if (argc < 2)
186 		return CMD_RET_USAGE;
187 
188 	secs = simple_strtoul(argv[1], NULL, 10);
189 	printf("GSC Sleeping for %ld seconds\n", secs);
190 
191 	i2c_set_bus_num(0);
192 	reg = (secs >> 24) & 0xff;
193 	if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, &reg, 1))
194 		goto error;
195 	reg = (secs >> 16) & 0xff;
196 	if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, &reg, 1))
197 		goto error;
198 	reg = (secs >> 8) & 0xff;
199 	if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, &reg, 1))
200 		goto error;
201 	reg = secs & 0xff;
202 	if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, &reg, 1))
203 		goto error;
204 	if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
205 		goto error;
206 	reg |= (1 << 2);
207 	if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
208 		goto error;
209 	reg &= ~(1 << 2);
210 	reg |= 0x3;
211 	if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
212 		goto error;
213 
214 	return CMD_RET_SUCCESS;
215 
216 error:
217 	printf("i2c error\n");
218 	return CMD_RET_FAILURE;
219 }
220 
221 static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
222 {
223 	unsigned char reg;
224 
225 	if (argc < 2)
226 		return CMD_RET_USAGE;
227 
228 	if (strcasecmp(argv[1], "enable") == 0) {
229 		int timeout = 0;
230 
231 		if (argc > 2)
232 			timeout = simple_strtoul(argv[2], NULL, 10);
233 		i2c_set_bus_num(0);
234 		if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
235 			return CMD_RET_FAILURE;
236 		reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
237 		if (timeout == 60)
238 			reg |= (1 << GSC_SC_CTRL1_WDTIME);
239 		else
240 			timeout = 30;
241 		reg |= (1 << GSC_SC_CTRL1_WDEN);
242 		if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
243 			return CMD_RET_FAILURE;
244 		printf("GSC Watchdog enabled with timeout=%d seconds\n",
245 		       timeout);
246 	} else if (strcasecmp(argv[1], "disable") == 0) {
247 		i2c_set_bus_num(0);
248 		if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
249 			return CMD_RET_FAILURE;
250 		reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
251 		if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
252 			return CMD_RET_FAILURE;
253 		printf("GSC Watchdog disabled\n");
254 	} else {
255 		return CMD_RET_USAGE;
256 	}
257 	return CMD_RET_SUCCESS;
258 }
259 
260 static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
261 {
262 	if (argc < 2)
263 		return gsc_info(1);
264 
265 	if (strcasecmp(argv[1], "wd") == 0)
266 		return do_gsc_wd(cmdtp, flag, --argc, ++argv);
267 	else if (strcasecmp(argv[1], "sleep") == 0)
268 		return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
269 
270 	return CMD_RET_USAGE;
271 }
272 
273 U_BOOT_CMD(
274 	gsc, 4, 1, do_gsc, "GSC configuration",
275 	"[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
276 	);
277 
278 #endif /* CONFIG_CMD_GSC */
279