10b2e13d9SChunhe Lan /* 20b2e13d9SChunhe Lan * Copyright 2014 Freescale Semiconductor, Inc. 30b2e13d9SChunhe Lan * 40b2e13d9SChunhe Lan * SPDX-License-Identifier: GPL-2.0+ 50b2e13d9SChunhe Lan */ 60b2e13d9SChunhe Lan 70b2e13d9SChunhe Lan #include <common.h> 80b2e13d9SChunhe Lan #include <asm/mmu.h> 90b2e13d9SChunhe Lan 100b2e13d9SChunhe Lan struct fsl_e_tlb_entry tlb_table[] = { 110b2e13d9SChunhe Lan /* TLB 0 - for temp stack in cache */ 120b2e13d9SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, 130b2e13d9SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR_PHYS, 140b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 150b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 160b2e13d9SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, 170b2e13d9SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024, 180b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 190b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 200b2e13d9SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, 210b2e13d9SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024, 220b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 230b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 240b2e13d9SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, 250b2e13d9SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024, 260b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 270b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 280b2e13d9SChunhe Lan 290b2e13d9SChunhe Lan /* TLB 1 */ 300b2e13d9SChunhe Lan /* *I*** - Covers boot page */ 310b2e13d9SChunhe Lan #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) 320b2e13d9SChunhe Lan /* 330b2e13d9SChunhe Lan * *I*G - L3SRAM. When L3 is used as 512K SRAM */ 340b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR, 350b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 360b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_512K, 1), 370b2e13d9SChunhe Lan #else 380b2e13d9SChunhe Lan SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, 390b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 400b2e13d9SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 1), 410b2e13d9SChunhe Lan #endif 420b2e13d9SChunhe Lan 430b2e13d9SChunhe Lan /* *I*G* - CCSRBAR */ 440b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, 450b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 460b2e13d9SChunhe Lan 0, 1, BOOKE_PAGESZ_16M, 1), 470b2e13d9SChunhe Lan 480b2e13d9SChunhe Lan /* *I*G* - Flash, localbus */ 490b2e13d9SChunhe Lan /* This will be changed to *I*G* after relocation to RAM. */ 500b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, 510b2e13d9SChunhe Lan MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, 520b2e13d9SChunhe Lan 0, 2, BOOKE_PAGESZ_256M, 1), 530b2e13d9SChunhe Lan 540b2e13d9SChunhe Lan /* *I*G* - PCI */ 550b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, 560b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 570b2e13d9SChunhe Lan 0, 3, BOOKE_PAGESZ_1G, 1), 580b2e13d9SChunhe Lan 590b2e13d9SChunhe Lan /* *I*G* - PCI */ 600b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000, 610b2e13d9SChunhe Lan CONFIG_SYS_PCIE1_MEM_PHYS + 0x40000000, 620b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 630b2e13d9SChunhe Lan 0, 4, BOOKE_PAGESZ_256M, 1), 640b2e13d9SChunhe Lan 650b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000, 660b2e13d9SChunhe Lan CONFIG_SYS_PCIE1_MEM_PHYS + 0x50000000, 670b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 680b2e13d9SChunhe Lan 0, 5, BOOKE_PAGESZ_256M, 1), 690b2e13d9SChunhe Lan 700b2e13d9SChunhe Lan /* *I*G* - PCI I/O */ 710b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS, 720b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 730b2e13d9SChunhe Lan 0, 6, BOOKE_PAGESZ_256K, 1), 740b2e13d9SChunhe Lan 750b2e13d9SChunhe Lan /* Bman/Qman */ 760b2e13d9SChunhe Lan #ifdef CONFIG_SYS_BMAN_MEM_PHYS 770b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS, 780b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 790b2e13d9SChunhe Lan 0, 9, BOOKE_PAGESZ_16M, 1), 800b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x01000000, 810b2e13d9SChunhe Lan CONFIG_SYS_BMAN_MEM_PHYS + 0x01000000, 820b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 830b2e13d9SChunhe Lan 0, 10, BOOKE_PAGESZ_16M, 1), 840b2e13d9SChunhe Lan #endif 850b2e13d9SChunhe Lan #ifdef CONFIG_SYS_QMAN_MEM_PHYS 860b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS, 870b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 880b2e13d9SChunhe Lan 0, 11, BOOKE_PAGESZ_16M, 1), 890b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x01000000, 900b2e13d9SChunhe Lan CONFIG_SYS_QMAN_MEM_PHYS + 0x01000000, 910b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 920b2e13d9SChunhe Lan 0, 12, BOOKE_PAGESZ_16M, 1), 930b2e13d9SChunhe Lan #endif 940b2e13d9SChunhe Lan #ifdef CONFIG_SYS_DCSRBAR_PHYS 950b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS, 960b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 970b2e13d9SChunhe Lan 0, 13, BOOKE_PAGESZ_32M, 1), 980b2e13d9SChunhe Lan #endif 990b2e13d9SChunhe Lan #ifdef CONFIG_SYS_NAND_BASE 1000b2e13d9SChunhe Lan /* 1010b2e13d9SChunhe Lan * *I*G - NAND 1020b2e13d9SChunhe Lan * entry 14 and 15 has been used hard coded, they will be disabled 1030b2e13d9SChunhe Lan * in cpu_init_f, so we use entry 16 for nand. 1040b2e13d9SChunhe Lan */ 1050b2e13d9SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, 1060b2e13d9SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 1070b2e13d9SChunhe Lan 0, 16, BOOKE_PAGESZ_64K, 1), 1080b2e13d9SChunhe Lan #endif 109*ab06b236SChunhe Lan #ifdef CONFIG_SYS_CPLD_BASE 110*ab06b236SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS, 111*ab06b236SChunhe Lan MAS3_SW|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 112*ab06b236SChunhe Lan 0, 17, BOOKE_PAGESZ_4K, 1), 113*ab06b236SChunhe Lan #endif 1140b2e13d9SChunhe Lan }; 1150b2e13d9SChunhe Lan 1160b2e13d9SChunhe Lan int num_tlb_entries = ARRAY_SIZE(tlb_table); 117