1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2014 Freescale Semiconductor, Inc. 4 */ 5 6 #include <common.h> 7 #include <command.h> 8 #include <i2c.h> 9 #include <netdev.h> 10 #include <linux/compiler.h> 11 #include <asm/mmu.h> 12 #include <asm/processor.h> 13 #include <asm/cache.h> 14 #include <asm/immap_85xx.h> 15 #include <asm/fsl_law.h> 16 #include <asm/fsl_serdes.h> 17 #include <asm/fsl_liodn.h> 18 #include <fm_eth.h> 19 20 #include "t4rdb.h" 21 #include "cpld.h" 22 #include "../common/vid.h" 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 int checkboard(void) 27 { 28 struct cpu_type *cpu = gd->arch.cpu; 29 u8 sw; 30 31 printf("Board: %sRDB, ", cpu->name); 32 printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ", 33 CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver)); 34 35 sw = CPLD_READ(vbank); 36 sw = sw & CPLD_BANK_SEL_MASK; 37 38 if (sw <= 7) 39 printf("vBank: %d\n", sw); 40 else 41 printf("Unsupported Bank=%x\n", sw); 42 43 puts("SERDES Reference Clocks:\n"); 44 printf(" SERDES1=100MHz SERDES2=156.25MHz\n" 45 " SERDES3=100MHz SERDES4=100MHz\n"); 46 47 return 0; 48 } 49 50 int board_early_init_r(void) 51 { 52 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; 53 int flash_esel = find_tlb_idx((void *)flashbase, 1); 54 55 /* 56 * Remap Boot flash + PROMJET region to caching-inhibited 57 * so that flash can be erased properly. 58 */ 59 60 /* Flush d-cache and invalidate i-cache of any FLASH data */ 61 flush_dcache(); 62 invalidate_icache(); 63 64 if (flash_esel == -1) { 65 /* very unlikely unless something is messed up */ 66 puts("Error: Could not find TLB for FLASH BASE\n"); 67 flash_esel = 2; /* give our best effort to continue */ 68 } else { 69 /* invalidate existing TLB entry for flash + promjet */ 70 disable_tlb(flash_esel); 71 } 72 73 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, 74 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 75 0, flash_esel, BOOKE_PAGESZ_256M, 1); 76 77 /* 78 * Adjust core voltage according to voltage ID 79 * This function changes I2C mux to channel 2. 80 */ 81 if (adjust_vdd(0)) 82 printf("Warning: Adjusting core voltage failed.\n"); 83 84 return 0; 85 } 86 87 int misc_init_r(void) 88 { 89 return 0; 90 } 91 92 int ft_board_setup(void *blob, bd_t *bd) 93 { 94 phys_addr_t base; 95 phys_size_t size; 96 97 ft_cpu_setup(blob, bd); 98 99 base = env_get_bootm_low(); 100 size = env_get_bootm_size(); 101 102 fdt_fixup_memory(blob, (u64)base, (u64)size); 103 104 #ifdef CONFIG_PCI 105 pci_of_setup(blob, bd); 106 #endif 107 108 fdt_fixup_liodn(blob); 109 fsl_fdt_fixup_dr_usb(blob, bd); 110 111 #ifdef CONFIG_SYS_DPAA_FMAN 112 fdt_fixup_fman_ethernet(blob); 113 fdt_fixup_board_enet(blob); 114 #endif 115 116 return 0; 117 } 118 119 /* 120 * This function is called by bdinfo to print detail board information. 121 * As an exmaple for future board, we organize the messages into 122 * several sections. If applicable, the message is in the format of 123 * <name> = <value> 124 * It should aligned with normal output of bdinfo command. 125 * 126 * Voltage: Core, DDR and another configurable voltages 127 * Clock : Critical clocks which are not printed already 128 * RCW : RCW source if not printed already 129 * Misc : Other important information not in above catagories 130 */ 131 void board_detail(void) 132 { 133 int rcwsrc; 134 135 /* RCW section SW3[4] */ 136 rcwsrc = 0x0; 137 puts("RCW source = "); 138 switch (rcwsrc & 0x1) { 139 case 0x1: 140 puts("SDHC/eMMC\n"); 141 break; 142 default: 143 puts("I2C normal addressing\n"); 144 break; 145 } 146 } 147