10b2e13d9SChunhe Lan /*
20b2e13d9SChunhe Lan  * Copyright 2014 Freescale Semiconductor, Inc.
30b2e13d9SChunhe Lan  *
40b2e13d9SChunhe Lan  * SPDX-License-Identifier: GPL-2.0+
50b2e13d9SChunhe Lan  */
60b2e13d9SChunhe Lan 
70b2e13d9SChunhe Lan #include <common.h>
80b2e13d9SChunhe Lan #include <command.h>
90b2e13d9SChunhe Lan #include <i2c.h>
100b2e13d9SChunhe Lan #include <netdev.h>
110b2e13d9SChunhe Lan #include <linux/compiler.h>
120b2e13d9SChunhe Lan #include <asm/mmu.h>
130b2e13d9SChunhe Lan #include <asm/processor.h>
140b2e13d9SChunhe Lan #include <asm/cache.h>
150b2e13d9SChunhe Lan #include <asm/immap_85xx.h>
160b2e13d9SChunhe Lan #include <asm/fsl_law.h>
170b2e13d9SChunhe Lan #include <asm/fsl_serdes.h>
180b2e13d9SChunhe Lan #include <asm/fsl_portals.h>
190b2e13d9SChunhe Lan #include <asm/fsl_liodn.h>
200b2e13d9SChunhe Lan #include <fm_eth.h>
210b2e13d9SChunhe Lan 
220b2e13d9SChunhe Lan #include "t4rdb.h"
230b2e13d9SChunhe Lan 
240b2e13d9SChunhe Lan DECLARE_GLOBAL_DATA_PTR;
250b2e13d9SChunhe Lan 
260b2e13d9SChunhe Lan int checkboard(void)
270b2e13d9SChunhe Lan {
280b2e13d9SChunhe Lan 	struct cpu_type *cpu = gd->arch.cpu;
290b2e13d9SChunhe Lan 
300b2e13d9SChunhe Lan 	printf("Board: %sRDB, ", cpu->name);
310b2e13d9SChunhe Lan 
320b2e13d9SChunhe Lan 	puts("SERDES Reference Clocks:\n");
330b2e13d9SChunhe Lan 	printf("       SERDES1=100MHz SERDES2=156.25MHz\n"
340b2e13d9SChunhe Lan 	       "       SERDES3=100MHz SERDES4=100MHz\n");
350b2e13d9SChunhe Lan 
360b2e13d9SChunhe Lan 	return 0;
370b2e13d9SChunhe Lan }
380b2e13d9SChunhe Lan 
390b2e13d9SChunhe Lan int board_early_init_r(void)
400b2e13d9SChunhe Lan {
410b2e13d9SChunhe Lan 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
42*9d045682SYork Sun 	int flash_esel = find_tlb_idx((void *)flashbase, 1);
430b2e13d9SChunhe Lan 
440b2e13d9SChunhe Lan 	/*
450b2e13d9SChunhe Lan 	 * Remap Boot flash + PROMJET region to caching-inhibited
460b2e13d9SChunhe Lan 	 * so that flash can be erased properly.
470b2e13d9SChunhe Lan 	 */
480b2e13d9SChunhe Lan 
490b2e13d9SChunhe Lan 	/* Flush d-cache and invalidate i-cache of any FLASH data */
500b2e13d9SChunhe Lan 	flush_dcache();
510b2e13d9SChunhe Lan 	invalidate_icache();
520b2e13d9SChunhe Lan 
53*9d045682SYork Sun 	if (flash_esel == -1) {
54*9d045682SYork Sun 		/* very unlikely unless something is messed up */
55*9d045682SYork Sun 		puts("Error: Could not find TLB for FLASH BASE\n");
56*9d045682SYork Sun 		flash_esel = 2;	/* give our best effort to continue */
57*9d045682SYork Sun 	} else {
580b2e13d9SChunhe Lan 		/* invalidate existing TLB entry for flash + promjet */
590b2e13d9SChunhe Lan 		disable_tlb(flash_esel);
60*9d045682SYork Sun 	}
610b2e13d9SChunhe Lan 
620b2e13d9SChunhe Lan 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
630b2e13d9SChunhe Lan 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
640b2e13d9SChunhe Lan 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
650b2e13d9SChunhe Lan 
660b2e13d9SChunhe Lan 	set_liodns();
670b2e13d9SChunhe Lan #ifdef CONFIG_SYS_DPAA_QBMAN
680b2e13d9SChunhe Lan 	setup_portals();
690b2e13d9SChunhe Lan #endif
700b2e13d9SChunhe Lan 
710b2e13d9SChunhe Lan 	return 0;
720b2e13d9SChunhe Lan }
730b2e13d9SChunhe Lan 
740b2e13d9SChunhe Lan int misc_init_r(void)
750b2e13d9SChunhe Lan {
760b2e13d9SChunhe Lan 	return 0;
770b2e13d9SChunhe Lan }
780b2e13d9SChunhe Lan 
790b2e13d9SChunhe Lan void ft_board_setup(void *blob, bd_t *bd)
800b2e13d9SChunhe Lan {
810b2e13d9SChunhe Lan 	phys_addr_t base;
820b2e13d9SChunhe Lan 	phys_size_t size;
830b2e13d9SChunhe Lan 
840b2e13d9SChunhe Lan 	ft_cpu_setup(blob, bd);
850b2e13d9SChunhe Lan 
860b2e13d9SChunhe Lan 	base = getenv_bootm_low();
870b2e13d9SChunhe Lan 	size = getenv_bootm_size();
880b2e13d9SChunhe Lan 
890b2e13d9SChunhe Lan 	fdt_fixup_memory(blob, (u64)base, (u64)size);
900b2e13d9SChunhe Lan 
910b2e13d9SChunhe Lan #ifdef CONFIG_PCI
920b2e13d9SChunhe Lan 	pci_of_setup(blob, bd);
930b2e13d9SChunhe Lan #endif
940b2e13d9SChunhe Lan 
950b2e13d9SChunhe Lan 	fdt_fixup_liodn(blob);
960b2e13d9SChunhe Lan 	fdt_fixup_dr_usb(blob, bd);
970b2e13d9SChunhe Lan 
980b2e13d9SChunhe Lan #ifdef CONFIG_SYS_DPAA_FMAN
990b2e13d9SChunhe Lan 	fdt_fixup_fman_ethernet(blob);
1000b2e13d9SChunhe Lan 	fdt_fixup_board_enet(blob);
1010b2e13d9SChunhe Lan #endif
1020b2e13d9SChunhe Lan }
1030b2e13d9SChunhe Lan 
1040b2e13d9SChunhe Lan /*
1050b2e13d9SChunhe Lan  * This function is called by bdinfo to print detail board information.
1060b2e13d9SChunhe Lan  * As an exmaple for future board, we organize the messages into
1070b2e13d9SChunhe Lan  * several sections. If applicable, the message is in the format of
1080b2e13d9SChunhe Lan  * <name>      = <value>
1090b2e13d9SChunhe Lan  * It should aligned with normal output of bdinfo command.
1100b2e13d9SChunhe Lan  *
1110b2e13d9SChunhe Lan  * Voltage: Core, DDR and another configurable voltages
1120b2e13d9SChunhe Lan  * Clock  : Critical clocks which are not printed already
1130b2e13d9SChunhe Lan  * RCW    : RCW source if not printed already
1140b2e13d9SChunhe Lan  * Misc   : Other important information not in above catagories
1150b2e13d9SChunhe Lan  */
1160b2e13d9SChunhe Lan void board_detail(void)
1170b2e13d9SChunhe Lan {
1180b2e13d9SChunhe Lan 	int rcwsrc;
1190b2e13d9SChunhe Lan 
1200b2e13d9SChunhe Lan 	/* RCW section SW3[4] */
1210b2e13d9SChunhe Lan 	rcwsrc = 0x0;
1220b2e13d9SChunhe Lan 	puts("RCW source  = ");
1230b2e13d9SChunhe Lan 	switch (rcwsrc & 0x1) {
1240b2e13d9SChunhe Lan 	case 0x1:
1250b2e13d9SChunhe Lan 		puts("SDHC/eMMC\n");
1260b2e13d9SChunhe Lan 		break;
1270b2e13d9SChunhe Lan 	default:
1280b2e13d9SChunhe Lan 		puts("I2C normal addressing\n");
1290b2e13d9SChunhe Lan 		break;
1300b2e13d9SChunhe Lan 	}
1310b2e13d9SChunhe Lan }
132