1 /** 2 * Copyright 2014 Freescale Semiconductor 3 * 4 * Author: Chunhe Lan <Chunhe.Lan@freescale.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 * 8 * This file provides support for the board-specific CPLD used on some Freescale 9 * reference boards. 10 * 11 * The following macros need to be defined: 12 * 13 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the 14 * CPLD register map 15 * 16 */ 17 18 #include <common.h> 19 #include <command.h> 20 #include <asm/io.h> 21 22 #include "cpld.h" 23 24 u8 cpld_read(unsigned int reg) 25 { 26 void *p = (void *)CONFIG_SYS_CPLD_BASE; 27 28 return in_8(p + reg); 29 } 30 31 void cpld_write(unsigned int reg, u8 value) 32 { 33 void *p = (void *)CONFIG_SYS_CPLD_BASE; 34 35 out_8(p + reg, value); 36 } 37 38 /** 39 * Set the boot bank to the alternate bank 40 */ 41 void cpld_set_altbank(void) 42 { 43 u8 val, curbank, altbank, override; 44 45 val = CPLD_READ(vbank); 46 curbank = val & CPLD_BANK_SEL_MASK; 47 48 switch (curbank) { 49 case CPLD_SELECT_BANK0: 50 altbank = CPLD_SELECT_BANK4; 51 CPLD_WRITE(vbank, altbank); 52 override = CPLD_READ(software_on); 53 CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN); 54 CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET); 55 break; 56 case CPLD_SELECT_BANK4: 57 altbank = CPLD_SELECT_BANK0; 58 CPLD_WRITE(vbank, altbank); 59 override = CPLD_READ(software_on); 60 CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN); 61 CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET); 62 break; 63 default: 64 printf("CPLD Altbank Fail: Invalid value!\n"); 65 return; 66 } 67 } 68 69 /** 70 * Set the boot bank to the default bank 71 */ 72 void cpld_set_defbank(void) 73 { 74 u8 val; 75 76 val = CPLD_DEFAULT_BANK; 77 78 CPLD_WRITE(global_reset, val); 79 } 80 81 #ifdef DEBUG 82 static void cpld_dump_regs(void) 83 { 84 printf("chip_id1 = 0x%02x\n", CPLD_READ(chip_id1)); 85 printf("chip_id2 = 0x%02x\n", CPLD_READ(chip_id2)); 86 printf("sw_maj_ver = 0x%02x\n", CPLD_READ(sw_maj_ver)); 87 printf("sw_min_ver = 0x%02x\n", CPLD_READ(sw_min_ver)); 88 printf("hw_ver = 0x%02x\n", CPLD_READ(hw_ver)); 89 printf("software_on = 0x%02x\n", CPLD_READ(software_on)); 90 printf("cfg_rcw_src = 0x%02x\n", CPLD_READ(cfg_rcw_src)); 91 printf("res0 = 0x%02x\n", CPLD_READ(res0)); 92 printf("vbank = 0x%02x\n", CPLD_READ(vbank)); 93 printf("sw1_sysclk = 0x%02x\n", CPLD_READ(sw1_sysclk)); 94 printf("sw2_status = 0x%02x\n", CPLD_READ(sw2_status)); 95 printf("sw3_status = 0x%02x\n", CPLD_READ(sw3_status)); 96 printf("sw4_status = 0x%02x\n", CPLD_READ(sw4_status)); 97 printf("sys_reset = 0x%02x\n", CPLD_READ(sys_reset)); 98 printf("global_reset = 0x%02x\n", CPLD_READ(global_reset)); 99 printf("res1 = 0x%02x\n", CPLD_READ(res1)); 100 putc('\n'); 101 } 102 #endif 103 104 #ifndef CONFIG_SPL_BUILD 105 int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 106 { 107 int rc = 0; 108 109 if (argc <= 1) 110 return cmd_usage(cmdtp); 111 112 if (strcmp(argv[1], "reset") == 0) { 113 if (strcmp(argv[2], "altbank") == 0) 114 cpld_set_altbank(); 115 else 116 cpld_set_defbank(); 117 #ifdef DEBUG 118 } else if (strcmp(argv[1], "dump") == 0) { 119 cpld_dump_regs(); 120 #endif 121 } else 122 rc = cmd_usage(cmdtp); 123 124 return rc; 125 } 126 127 U_BOOT_CMD( 128 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld, 129 "Reset the board or alternate bank", 130 "reset - reset to default bank\n" 131 "cpld reset altbank - reset to alternate bank\n" 132 #ifdef DEBUG 133 "cpld dump - display the CPLD registers\n" 134 #endif 135 ); 136 #endif 137