11cb19fbbSYork Sun /* 21cb19fbbSYork Sun * Copyright 2009-2012 Freescale Semiconductor, Inc. 31cb19fbbSYork Sun * 43aab0cd8SYork Sun * SPDX-License-Identifier: GPL-2.0+ 51cb19fbbSYork Sun */ 61cb19fbbSYork Sun 71cb19fbbSYork Sun #include <common.h> 81cb19fbbSYork Sun #include <command.h> 91cb19fbbSYork Sun #include <i2c.h> 101cb19fbbSYork Sun #include <netdev.h> 111cb19fbbSYork Sun #include <linux/compiler.h> 121cb19fbbSYork Sun #include <asm/mmu.h> 131cb19fbbSYork Sun #include <asm/processor.h> 141cb19fbbSYork Sun #include <asm/cache.h> 151cb19fbbSYork Sun #include <asm/immap_85xx.h> 161cb19fbbSYork Sun #include <asm/fsl_law.h> 171cb19fbbSYork Sun #include <asm/fsl_serdes.h> 181cb19fbbSYork Sun #include <asm/fsl_portals.h> 191cb19fbbSYork Sun #include <asm/fsl_liodn.h> 201cb19fbbSYork Sun #include <fm_eth.h> 211cb19fbbSYork Sun 221cb19fbbSYork Sun #include "../common/qixis.h" 231cb19fbbSYork Sun #include "../common/vsc3316_3308.h" 241cb19fbbSYork Sun #include "t4qds.h" 251cb19fbbSYork Sun #include "t4240qds_qixis.h" 261cb19fbbSYork Sun 271cb19fbbSYork Sun DECLARE_GLOBAL_DATA_PTR; 281cb19fbbSYork Sun 29*7d0d355fSShaohui Xie static int8_t vsc3316_fsm1_tx[8][2] = { {0, 0}, {1, 1}, {6, 6}, {7, 7}, 301cb19fbbSYork Sun {8, 8}, {9, 9}, {14, 14}, {15, 15} }; 311cb19fbbSYork Sun 32*7d0d355fSShaohui Xie static int8_t vsc3316_fsm2_tx[8][2] = { {2, 2}, {3, 3}, {4, 4}, {5, 5}, 331cb19fbbSYork Sun {10, 10}, {11, 11}, {12, 12}, {13, 13} }; 341cb19fbbSYork Sun 35*7d0d355fSShaohui Xie static int8_t vsc3316_fsm1_rx[8][2] = { {2, 12}, {3, 13}, {4, 5}, {5, 4}, 361cb19fbbSYork Sun {10, 11}, {11, 10}, {12, 2}, {13, 3} }; 371cb19fbbSYork Sun 38*7d0d355fSShaohui Xie static int8_t vsc3316_fsm2_rx[8][2] = { {0, 15}, {1, 14}, {6, 7}, {7, 6}, 391cb19fbbSYork Sun {8, 9}, {9, 8}, {14, 1}, {15, 0} }; 401cb19fbbSYork Sun 411cb19fbbSYork Sun int checkboard(void) 421cb19fbbSYork Sun { 431cb19fbbSYork Sun char buf[64]; 441cb19fbbSYork Sun u8 sw; 451cb19fbbSYork Sun struct cpu_type *cpu = gd->arch.cpu; 461cb19fbbSYork Sun unsigned int i; 471cb19fbbSYork Sun 481cb19fbbSYork Sun printf("Board: %sQDS, ", cpu->name); 491cb19fbbSYork Sun printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, ", 501cb19fbbSYork Sun QIXIS_READ(id), QIXIS_READ(arch)); 511cb19fbbSYork Sun 521cb19fbbSYork Sun sw = QIXIS_READ(brdcfg[0]); 531cb19fbbSYork Sun sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; 541cb19fbbSYork Sun 551cb19fbbSYork Sun if (sw < 0x8) 561cb19fbbSYork Sun printf("vBank: %d\n", sw); 571cb19fbbSYork Sun else if (sw == 0x8) 581cb19fbbSYork Sun puts("Promjet\n"); 591cb19fbbSYork Sun else if (sw == 0x9) 601cb19fbbSYork Sun puts("NAND\n"); 611cb19fbbSYork Sun else 621cb19fbbSYork Sun printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); 631cb19fbbSYork Sun 641cb19fbbSYork Sun printf("FPGA: v%d (%s), build %d", 651cb19fbbSYork Sun (int)QIXIS_READ(scver), qixis_read_tag(buf), 661cb19fbbSYork Sun (int)qixis_read_minor()); 671cb19fbbSYork Sun /* the timestamp string contains "\n" at the end */ 681cb19fbbSYork Sun printf(" on %s", qixis_read_time(buf)); 691cb19fbbSYork Sun 701cb19fbbSYork Sun /* 711cb19fbbSYork Sun * Display the actual SERDES reference clocks as configured by the 721cb19fbbSYork Sun * dip switches on the board. Note that the SWx registers could 731cb19fbbSYork Sun * technically be set to force the reference clocks to match the 741cb19fbbSYork Sun * values that the SERDES expects (or vice versa). For now, however, 751cb19fbbSYork Sun * we just display both values and hope the user notices when they 761cb19fbbSYork Sun * don't match. 771cb19fbbSYork Sun */ 781cb19fbbSYork Sun puts("SERDES Reference Clocks: "); 791cb19fbbSYork Sun sw = QIXIS_READ(brdcfg[2]); 801cb19fbbSYork Sun for (i = 0; i < MAX_SERDES; i++) { 811cb19fbbSYork Sun static const char * const freq[] = { 821cb19fbbSYork Sun "100", "125", "156.25", "161.1328125"}; 831cb19fbbSYork Sun unsigned int clock = (sw >> (6 - 2 * i)) & 3; 841cb19fbbSYork Sun 851cb19fbbSYork Sun printf("SERDES%u=%sMHz ", i+1, freq[clock]); 861cb19fbbSYork Sun } 871cb19fbbSYork Sun puts("\n"); 881cb19fbbSYork Sun 891cb19fbbSYork Sun return 0; 901cb19fbbSYork Sun } 911cb19fbbSYork Sun 921cb19fbbSYork Sun int select_i2c_ch_pca9547(u8 ch) 931cb19fbbSYork Sun { 941cb19fbbSYork Sun int ret; 951cb19fbbSYork Sun 961cb19fbbSYork Sun ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); 971cb19fbbSYork Sun if (ret) { 981cb19fbbSYork Sun puts("PCA: failed to select proper channel\n"); 991cb19fbbSYork Sun return ret; 1001cb19fbbSYork Sun } 1011cb19fbbSYork Sun 1021cb19fbbSYork Sun return 0; 1031cb19fbbSYork Sun } 1041cb19fbbSYork Sun 1051cb19fbbSYork Sun /* 1061cb19fbbSYork Sun * read_voltage from sensor on I2C bus 1071cb19fbbSYork Sun * We use average of 4 readings, waiting for 532us befor another reading 1081cb19fbbSYork Sun */ 1091cb19fbbSYork Sun #define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ 1101cb19fbbSYork Sun #define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ 1111cb19fbbSYork Sun 1121cb19fbbSYork Sun static inline int read_voltage(void) 1131cb19fbbSYork Sun { 1141cb19fbbSYork Sun int i, ret, voltage_read = 0; 1151cb19fbbSYork Sun u16 vol_mon; 1161cb19fbbSYork Sun 1171cb19fbbSYork Sun for (i = 0; i < NUM_READINGS; i++) { 1181cb19fbbSYork Sun ret = i2c_read(I2C_VOL_MONITOR_ADDR, 1191cb19fbbSYork Sun I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2); 1201cb19fbbSYork Sun if (ret) { 1211cb19fbbSYork Sun printf("VID: failed to read core voltage\n"); 1221cb19fbbSYork Sun return ret; 1231cb19fbbSYork Sun } 1241cb19fbbSYork Sun if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { 1251cb19fbbSYork Sun printf("VID: Core voltage sensor error\n"); 1261cb19fbbSYork Sun return -1; 1271cb19fbbSYork Sun } 1281cb19fbbSYork Sun debug("VID: bus voltage reads 0x%04x\n", vol_mon); 1291cb19fbbSYork Sun /* LSB = 4mv */ 1301cb19fbbSYork Sun voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; 1311cb19fbbSYork Sun udelay(WAIT_FOR_ADC); 1321cb19fbbSYork Sun } 1331cb19fbbSYork Sun /* calculate the average */ 1341cb19fbbSYork Sun voltage_read /= NUM_READINGS; 1351cb19fbbSYork Sun 1361cb19fbbSYork Sun return voltage_read; 1371cb19fbbSYork Sun } 1381cb19fbbSYork Sun 1391cb19fbbSYork Sun /* 1401cb19fbbSYork Sun * We need to calculate how long before the voltage starts to drop or increase 1411cb19fbbSYork Sun * It returns with the loop count. Each loop takes several readings (532us) 1421cb19fbbSYork Sun */ 1431cb19fbbSYork Sun static inline int wait_for_voltage_change(int vdd_last) 1441cb19fbbSYork Sun { 1451cb19fbbSYork Sun int timeout, vdd_current; 1461cb19fbbSYork Sun 1471cb19fbbSYork Sun vdd_current = read_voltage(); 1481cb19fbbSYork Sun /* wait until voltage starts to drop */ 1491cb19fbbSYork Sun for (timeout = 0; abs(vdd_last - vdd_current) <= 4 && 1501cb19fbbSYork Sun timeout < 100; timeout++) { 1511cb19fbbSYork Sun vdd_current = read_voltage(); 1521cb19fbbSYork Sun } 1531cb19fbbSYork Sun if (timeout >= 100) { 1541cb19fbbSYork Sun printf("VID: Voltage adjustment timeout\n"); 1551cb19fbbSYork Sun return -1; 1561cb19fbbSYork Sun } 1571cb19fbbSYork Sun return timeout; 1581cb19fbbSYork Sun } 1591cb19fbbSYork Sun 1601cb19fbbSYork Sun /* 1611cb19fbbSYork Sun * argument 'wait' is the time we know the voltage difference can be measured 1621cb19fbbSYork Sun * this function keeps reading the voltage until it is stable 1631cb19fbbSYork Sun */ 1641cb19fbbSYork Sun static inline int wait_for_voltage_stable(int wait) 1651cb19fbbSYork Sun { 1661cb19fbbSYork Sun int timeout, vdd_current, vdd_last; 1671cb19fbbSYork Sun 1681cb19fbbSYork Sun vdd_last = read_voltage(); 1691cb19fbbSYork Sun udelay(wait * NUM_READINGS * WAIT_FOR_ADC); 1701cb19fbbSYork Sun /* wait until voltage is stable */ 1711cb19fbbSYork Sun vdd_current = read_voltage(); 1721cb19fbbSYork Sun for (timeout = 0; abs(vdd_last - vdd_current) >= 4 && 1731cb19fbbSYork Sun timeout < 100; timeout++) { 1741cb19fbbSYork Sun vdd_last = vdd_current; 1751cb19fbbSYork Sun udelay(wait * NUM_READINGS * WAIT_FOR_ADC); 1761cb19fbbSYork Sun vdd_current = read_voltage(); 1771cb19fbbSYork Sun } 1781cb19fbbSYork Sun if (timeout >= 100) { 1791cb19fbbSYork Sun printf("VID: Voltage adjustment timeout\n"); 1801cb19fbbSYork Sun return -1; 1811cb19fbbSYork Sun } 1821cb19fbbSYork Sun 1831cb19fbbSYork Sun return vdd_current; 1841cb19fbbSYork Sun } 1851cb19fbbSYork Sun 1861cb19fbbSYork Sun static inline int set_voltage(u8 vid) 1871cb19fbbSYork Sun { 1881cb19fbbSYork Sun int wait, vdd_last; 1891cb19fbbSYork Sun 1901cb19fbbSYork Sun vdd_last = read_voltage(); 1911cb19fbbSYork Sun QIXIS_WRITE(brdcfg[6], vid); 1921cb19fbbSYork Sun wait = wait_for_voltage_change(vdd_last); 1931cb19fbbSYork Sun if (wait < 0) 1941cb19fbbSYork Sun return -1; 1951cb19fbbSYork Sun debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); 1961cb19fbbSYork Sun wait = wait ? wait : 1; 1971cb19fbbSYork Sun 1981cb19fbbSYork Sun vdd_last = wait_for_voltage_stable(wait); 1991cb19fbbSYork Sun if (vdd_last < 0) 2001cb19fbbSYork Sun return -1; 2011cb19fbbSYork Sun debug("VID: Current voltage is %d mV\n", vdd_last); 2021cb19fbbSYork Sun 2031cb19fbbSYork Sun return vdd_last; 2041cb19fbbSYork Sun } 2051cb19fbbSYork Sun 2061cb19fbbSYork Sun 2071cb19fbbSYork Sun static int adjust_vdd(ulong vdd_override) 2081cb19fbbSYork Sun { 2091cb19fbbSYork Sun int re_enable = disable_interrupts(); 2101cb19fbbSYork Sun ccsr_gur_t __iomem *gur = 2111cb19fbbSYork Sun (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 2121cb19fbbSYork Sun u32 fusesr; 2131cb19fbbSYork Sun u8 vid, vid_current; 2141cb19fbbSYork Sun int vdd_target, vdd_current, vdd_last; 2151cb19fbbSYork Sun int ret; 2161cb19fbbSYork Sun unsigned long vdd_string_override; 2171cb19fbbSYork Sun char *vdd_string; 2181cb19fbbSYork Sun static const uint16_t vdd[32] = { 2191cb19fbbSYork Sun 0, /* unused */ 2201cb19fbbSYork Sun 9875, /* 0.9875V */ 2211cb19fbbSYork Sun 9750, 2221cb19fbbSYork Sun 9625, 2231cb19fbbSYork Sun 9500, 2241cb19fbbSYork Sun 9375, 2251cb19fbbSYork Sun 9250, 2261cb19fbbSYork Sun 9125, 2271cb19fbbSYork Sun 9000, 2281cb19fbbSYork Sun 8875, 2291cb19fbbSYork Sun 8750, 2301cb19fbbSYork Sun 8625, 2311cb19fbbSYork Sun 8500, 2321cb19fbbSYork Sun 8375, 2331cb19fbbSYork Sun 8250, 2341cb19fbbSYork Sun 8125, 2351cb19fbbSYork Sun 10000, /* 1.0000V */ 2361cb19fbbSYork Sun 10125, 2371cb19fbbSYork Sun 10250, 2381cb19fbbSYork Sun 10375, 2391cb19fbbSYork Sun 10500, 2401cb19fbbSYork Sun 10625, 2411cb19fbbSYork Sun 10750, 2421cb19fbbSYork Sun 10875, 2431cb19fbbSYork Sun 11000, 2441cb19fbbSYork Sun 0, /* reserved */ 2451cb19fbbSYork Sun }; 2461cb19fbbSYork Sun struct vdd_drive { 2471cb19fbbSYork Sun u8 vid; 2481cb19fbbSYork Sun unsigned voltage; 2491cb19fbbSYork Sun }; 2501cb19fbbSYork Sun 2511cb19fbbSYork Sun ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR); 2521cb19fbbSYork Sun if (ret) { 2531cb19fbbSYork Sun debug("VID: I2c failed to switch channel\n"); 2541cb19fbbSYork Sun ret = -1; 2551cb19fbbSYork Sun goto exit; 2561cb19fbbSYork Sun } 2571cb19fbbSYork Sun 2581cb19fbbSYork Sun /* get the voltage ID from fuse status register */ 2591cb19fbbSYork Sun fusesr = in_be32(&gur->dcfg_fusesr); 2601cb19fbbSYork Sun vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & 2611cb19fbbSYork Sun FSL_CORENET_DCFG_FUSESR_VID_MASK; 2621cb19fbbSYork Sun if (vid == FSL_CORENET_DCFG_FUSESR_VID_MASK) { 2631cb19fbbSYork Sun vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & 2641cb19fbbSYork Sun FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; 2651cb19fbbSYork Sun } 2661cb19fbbSYork Sun vdd_target = vdd[vid]; 2671cb19fbbSYork Sun 2681cb19fbbSYork Sun /* check override variable for overriding VDD */ 2691cb19fbbSYork Sun vdd_string = getenv("t4240qds_vdd_mv"); 2701cb19fbbSYork Sun if (vdd_override == 0 && vdd_string && 2711cb19fbbSYork Sun !strict_strtoul(vdd_string, 10, &vdd_string_override)) 2721cb19fbbSYork Sun vdd_override = vdd_string_override; 2731cb19fbbSYork Sun if (vdd_override >= 819 && vdd_override <= 1212) { 2741cb19fbbSYork Sun vdd_target = vdd_override * 10; /* convert to 1/10 mV */ 2751cb19fbbSYork Sun debug("VDD override is %lu\n", vdd_override); 2761cb19fbbSYork Sun } else if (vdd_override != 0) { 2771cb19fbbSYork Sun printf("Invalid value.\n"); 2781cb19fbbSYork Sun } 2791cb19fbbSYork Sun 2801cb19fbbSYork Sun if (vdd_target == 0) { 2811cb19fbbSYork Sun debug("VID: VID not used\n"); 2821cb19fbbSYork Sun ret = 0; 2831cb19fbbSYork Sun goto exit; 2841cb19fbbSYork Sun } else { 2851cb19fbbSYork Sun /* round up and divice by 10 to get a value in mV */ 2861cb19fbbSYork Sun vdd_target = DIV_ROUND_UP(vdd_target, 10); 2871cb19fbbSYork Sun debug("VID: vid = %d mV\n", vdd_target); 2881cb19fbbSYork Sun } 2891cb19fbbSYork Sun 2901cb19fbbSYork Sun /* 2911cb19fbbSYork Sun * Check current board VID setting 2921cb19fbbSYork Sun * Voltage regulator support output to 6.250mv step 2931cb19fbbSYork Sun * The highes voltage allowed for this board is (vid=0x40) 1.21250V 2941cb19fbbSYork Sun * the lowest is (vid=0x7f) 0.81875V 2951cb19fbbSYork Sun */ 2961cb19fbbSYork Sun vid_current = QIXIS_READ(brdcfg[6]); 2971cb19fbbSYork Sun vdd_current = 121250 - (vid_current - 0x40) * 625; 2981cb19fbbSYork Sun debug("VID: Current vid setting is (0x%x) %d mV\n", 2991cb19fbbSYork Sun vid_current, vdd_current/100); 3001cb19fbbSYork Sun 3011cb19fbbSYork Sun /* 3021cb19fbbSYork Sun * Read voltage monitor to check real voltage. 3031cb19fbbSYork Sun * Voltage monitor LSB is 4mv. 3041cb19fbbSYork Sun */ 3051cb19fbbSYork Sun vdd_last = read_voltage(); 3061cb19fbbSYork Sun if (vdd_last < 0) { 3071cb19fbbSYork Sun printf("VID: Could not read voltage sensor abort VID adjustment\n"); 3081cb19fbbSYork Sun ret = -1; 3091cb19fbbSYork Sun goto exit; 3101cb19fbbSYork Sun } 3111cb19fbbSYork Sun debug("VID: Core voltage is at %d mV\n", vdd_last); 3121cb19fbbSYork Sun /* 3131cb19fbbSYork Sun * Adjust voltage to at or 8mV above target. 3141cb19fbbSYork Sun * Each step of adjustment is 6.25mV. 3151cb19fbbSYork Sun * Stepping down too fast may cause over current. 3161cb19fbbSYork Sun */ 3171cb19fbbSYork Sun while (vdd_last > 0 && vid_current < 0x80 && 3181cb19fbbSYork Sun vdd_last > (vdd_target + 8)) { 3191cb19fbbSYork Sun vid_current++; 3201cb19fbbSYork Sun vdd_last = set_voltage(vid_current); 3211cb19fbbSYork Sun } 3221cb19fbbSYork Sun /* 3231cb19fbbSYork Sun * Check if we need to step up 3241cb19fbbSYork Sun * This happens when board voltage switch was set too low 3251cb19fbbSYork Sun */ 3261cb19fbbSYork Sun while (vdd_last > 0 && vid_current >= 0x40 && 3271cb19fbbSYork Sun vdd_last < vdd_target + 2) { 3281cb19fbbSYork Sun vid_current--; 3291cb19fbbSYork Sun vdd_last = set_voltage(vid_current); 3301cb19fbbSYork Sun } 3311cb19fbbSYork Sun if (vdd_last > 0) 3321cb19fbbSYork Sun printf("VID: Core voltage %d mV\n", vdd_last); 3331cb19fbbSYork Sun else 3341cb19fbbSYork Sun ret = -1; 3351cb19fbbSYork Sun 3361cb19fbbSYork Sun exit: 3371cb19fbbSYork Sun if (re_enable) 3381cb19fbbSYork Sun enable_interrupts(); 3391cb19fbbSYork Sun return ret; 3401cb19fbbSYork Sun } 3411cb19fbbSYork Sun 3421cb19fbbSYork Sun /* Configure Crossbar switches for Front-Side SerDes Ports */ 3431cb19fbbSYork Sun int config_frontside_crossbar_vsc3316(void) 3441cb19fbbSYork Sun { 3451cb19fbbSYork Sun ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 3461cb19fbbSYork Sun u32 srds_prtcl_s1, srds_prtcl_s2; 3471cb19fbbSYork Sun int ret; 3481cb19fbbSYork Sun 3491cb19fbbSYork Sun ret = select_i2c_ch_pca9547(I2C_MUX_CH_VSC3316_FS); 3501cb19fbbSYork Sun if (ret) 3511cb19fbbSYork Sun return ret; 3521cb19fbbSYork Sun 3531cb19fbbSYork Sun srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & 3541cb19fbbSYork Sun FSL_CORENET2_RCWSR4_SRDS1_PRTCL; 3551cb19fbbSYork Sun srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; 3561cb19fbbSYork Sun if (srds_prtcl_s1) { 3571cb19fbbSYork Sun ret = vsc3316_config(VSC3316_FSM_TX_ADDR, vsc3316_fsm1_tx, 8); 3581cb19fbbSYork Sun if (ret) 3591cb19fbbSYork Sun return ret; 3601cb19fbbSYork Sun ret = vsc3316_config(VSC3316_FSM_RX_ADDR, vsc3316_fsm1_rx, 8); 3611cb19fbbSYork Sun if (ret) 3621cb19fbbSYork Sun return ret; 3631cb19fbbSYork Sun } 3641cb19fbbSYork Sun 3651cb19fbbSYork Sun srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) & 3661cb19fbbSYork Sun FSL_CORENET2_RCWSR4_SRDS2_PRTCL; 3671cb19fbbSYork Sun srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT; 3681cb19fbbSYork Sun if (srds_prtcl_s2) { 3691cb19fbbSYork Sun ret = vsc3316_config(VSC3316_FSM_TX_ADDR, vsc3316_fsm2_tx, 8); 3701cb19fbbSYork Sun if (ret) 3711cb19fbbSYork Sun return ret; 3721cb19fbbSYork Sun ret = vsc3316_config(VSC3316_FSM_RX_ADDR, vsc3316_fsm2_rx, 8); 3731cb19fbbSYork Sun if (ret) 3741cb19fbbSYork Sun return ret; 3751cb19fbbSYork Sun } 3761cb19fbbSYork Sun 3771cb19fbbSYork Sun return 0; 3781cb19fbbSYork Sun } 3791cb19fbbSYork Sun 3801cb19fbbSYork Sun int config_backside_crossbar_mux(void) 3811cb19fbbSYork Sun { 3821cb19fbbSYork Sun ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 3831cb19fbbSYork Sun u32 srds_prtcl_s3, srds_prtcl_s4; 3841cb19fbbSYork Sun u8 brdcfg; 3851cb19fbbSYork Sun 3861cb19fbbSYork Sun srds_prtcl_s3 = in_be32(&gur->rcwsr[4]) & 3871cb19fbbSYork Sun FSL_CORENET2_RCWSR4_SRDS3_PRTCL; 3881cb19fbbSYork Sun srds_prtcl_s3 >>= FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT; 3891cb19fbbSYork Sun switch (srds_prtcl_s3) { 3901cb19fbbSYork Sun case 0: 3911cb19fbbSYork Sun /* SerDes3 is not enabled */ 3921cb19fbbSYork Sun break; 3931cb19fbbSYork Sun case 2: 3941cb19fbbSYork Sun case 9: 3951cb19fbbSYork Sun case 10: 3961cb19fbbSYork Sun /* SD3(0:7) => SLOT5(0:7) */ 3971cb19fbbSYork Sun brdcfg = QIXIS_READ(brdcfg[12]); 3981cb19fbbSYork Sun brdcfg &= ~BRDCFG12_SD3MX_MASK; 3991cb19fbbSYork Sun brdcfg |= BRDCFG12_SD3MX_SLOT5; 4001cb19fbbSYork Sun QIXIS_WRITE(brdcfg[12], brdcfg); 4011cb19fbbSYork Sun break; 4021cb19fbbSYork Sun case 4: 4031cb19fbbSYork Sun case 6: 4041cb19fbbSYork Sun case 8: 4051cb19fbbSYork Sun case 12: 4061cb19fbbSYork Sun case 14: 4071cb19fbbSYork Sun case 16: 4081cb19fbbSYork Sun case 17: 4091cb19fbbSYork Sun case 19: 4101cb19fbbSYork Sun case 20: 4111cb19fbbSYork Sun /* SD3(4:7) => SLOT6(0:3) */ 4121cb19fbbSYork Sun brdcfg = QIXIS_READ(brdcfg[12]); 4131cb19fbbSYork Sun brdcfg &= ~BRDCFG12_SD3MX_MASK; 4141cb19fbbSYork Sun brdcfg |= BRDCFG12_SD3MX_SLOT6; 4151cb19fbbSYork Sun QIXIS_WRITE(brdcfg[12], brdcfg); 4161cb19fbbSYork Sun break; 4171cb19fbbSYork Sun default: 4181cb19fbbSYork Sun printf("WARNING: unsupported for SerDes3 Protocol %d\n", 4191cb19fbbSYork Sun srds_prtcl_s3); 4201cb19fbbSYork Sun return -1; 4211cb19fbbSYork Sun } 4221cb19fbbSYork Sun 4231cb19fbbSYork Sun srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) & 4241cb19fbbSYork Sun FSL_CORENET2_RCWSR4_SRDS4_PRTCL; 4251cb19fbbSYork Sun srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT; 4261cb19fbbSYork Sun switch (srds_prtcl_s4) { 4271cb19fbbSYork Sun case 0: 4281cb19fbbSYork Sun /* SerDes4 is not enabled */ 4291cb19fbbSYork Sun break; 4301cb19fbbSYork Sun case 2: 4311cb19fbbSYork Sun /* 10b, SD4(0:7) => SLOT7(0:7) */ 4321cb19fbbSYork Sun brdcfg = QIXIS_READ(brdcfg[12]); 4331cb19fbbSYork Sun brdcfg &= ~BRDCFG12_SD4MX_MASK; 4341cb19fbbSYork Sun brdcfg |= BRDCFG12_SD4MX_SLOT7; 4351cb19fbbSYork Sun QIXIS_WRITE(brdcfg[12], brdcfg); 4361cb19fbbSYork Sun break; 4371cb19fbbSYork Sun case 4: 4381cb19fbbSYork Sun case 6: 4391cb19fbbSYork Sun case 8: 4401cb19fbbSYork Sun /* x1b, SD4(4:7) => SLOT8(0:3) */ 4411cb19fbbSYork Sun brdcfg = QIXIS_READ(brdcfg[12]); 4421cb19fbbSYork Sun brdcfg &= ~BRDCFG12_SD4MX_MASK; 4431cb19fbbSYork Sun brdcfg |= BRDCFG12_SD4MX_SLOT8; 4441cb19fbbSYork Sun QIXIS_WRITE(brdcfg[12], brdcfg); 4451cb19fbbSYork Sun break; 4461cb19fbbSYork Sun case 10: 4471cb19fbbSYork Sun case 12: 4481cb19fbbSYork Sun case 14: 4491cb19fbbSYork Sun case 16: 4501cb19fbbSYork Sun case 18: 4511cb19fbbSYork Sun /* 00b, SD4(4:5) => AURORA, SD4(6:7) => SATA */ 4521cb19fbbSYork Sun brdcfg = QIXIS_READ(brdcfg[12]); 4531cb19fbbSYork Sun brdcfg &= ~BRDCFG12_SD4MX_MASK; 4541cb19fbbSYork Sun brdcfg |= BRDCFG12_SD4MX_AURO_SATA; 4551cb19fbbSYork Sun QIXIS_WRITE(brdcfg[12], brdcfg); 4561cb19fbbSYork Sun break; 4571cb19fbbSYork Sun default: 4581cb19fbbSYork Sun printf("WARNING: unsupported for SerDes4 Protocol %d\n", 4591cb19fbbSYork Sun srds_prtcl_s4); 4601cb19fbbSYork Sun return -1; 4611cb19fbbSYork Sun } 4621cb19fbbSYork Sun 4631cb19fbbSYork Sun return 0; 4641cb19fbbSYork Sun } 4651cb19fbbSYork Sun 4661cb19fbbSYork Sun int board_early_init_r(void) 4671cb19fbbSYork Sun { 4681cb19fbbSYork Sun const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; 4691cb19fbbSYork Sun const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); 4701cb19fbbSYork Sun 4711cb19fbbSYork Sun /* 4721cb19fbbSYork Sun * Remap Boot flash + PROMJET region to caching-inhibited 4731cb19fbbSYork Sun * so that flash can be erased properly. 4741cb19fbbSYork Sun */ 4751cb19fbbSYork Sun 4761cb19fbbSYork Sun /* Flush d-cache and invalidate i-cache of any FLASH data */ 4771cb19fbbSYork Sun flush_dcache(); 4781cb19fbbSYork Sun invalidate_icache(); 4791cb19fbbSYork Sun 4801cb19fbbSYork Sun /* invalidate existing TLB entry for flash + promjet */ 4811cb19fbbSYork Sun disable_tlb(flash_esel); 4821cb19fbbSYork Sun 4831cb19fbbSYork Sun set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, 4841cb19fbbSYork Sun MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 4851cb19fbbSYork Sun 0, flash_esel, BOOKE_PAGESZ_256M, 1); 4861cb19fbbSYork Sun 4871cb19fbbSYork Sun set_liodns(); 4881cb19fbbSYork Sun #ifdef CONFIG_SYS_DPAA_QBMAN 4891cb19fbbSYork Sun setup_portals(); 4901cb19fbbSYork Sun #endif 4911cb19fbbSYork Sun 4921cb19fbbSYork Sun /* Disable remote I2C connection to qixis fpga */ 4931cb19fbbSYork Sun QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE); 4941cb19fbbSYork Sun 4951cb19fbbSYork Sun /* 4961cb19fbbSYork Sun * Adjust core voltage according to voltage ID 4971cb19fbbSYork Sun * This function changes I2C mux to channel 2. 4981cb19fbbSYork Sun */ 4991cb19fbbSYork Sun if (adjust_vdd(0)) 5001cb19fbbSYork Sun printf("Warning: Adjusting core voltage failed.\n"); 5011cb19fbbSYork Sun 5021cb19fbbSYork Sun /* Configure board SERDES ports crossbar */ 5031cb19fbbSYork Sun config_frontside_crossbar_vsc3316(); 5041cb19fbbSYork Sun config_backside_crossbar_mux(); 5051cb19fbbSYork Sun select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); 5061cb19fbbSYork Sun 5071cb19fbbSYork Sun return 0; 5081cb19fbbSYork Sun } 5091cb19fbbSYork Sun 5101cb19fbbSYork Sun unsigned long get_board_sys_clk(void) 5111cb19fbbSYork Sun { 5121cb19fbbSYork Sun u8 sysclk_conf = QIXIS_READ(brdcfg[1]); 5131cb19fbbSYork Sun #ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT 5141cb19fbbSYork Sun /* use accurate clock measurement */ 5151cb19fbbSYork Sun int freq = QIXIS_READ(clk_freq[0]) << 8 | QIXIS_READ(clk_freq[1]); 5161cb19fbbSYork Sun int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]); 5171cb19fbbSYork Sun u32 val; 5181cb19fbbSYork Sun 5191cb19fbbSYork Sun val = freq * base; 5201cb19fbbSYork Sun if (val) { 5211cb19fbbSYork Sun debug("SYS Clock measurement is: %d\n", val); 5221cb19fbbSYork Sun return val; 5231cb19fbbSYork Sun } else { 5241cb19fbbSYork Sun printf("Warning: SYS clock measurement is invalid, using value from brdcfg1.\n"); 5251cb19fbbSYork Sun } 5261cb19fbbSYork Sun #endif 5271cb19fbbSYork Sun 5281cb19fbbSYork Sun switch (sysclk_conf & 0x0F) { 5291cb19fbbSYork Sun case QIXIS_SYSCLK_83: 5301cb19fbbSYork Sun return 83333333; 5311cb19fbbSYork Sun case QIXIS_SYSCLK_100: 5321cb19fbbSYork Sun return 100000000; 5331cb19fbbSYork Sun case QIXIS_SYSCLK_125: 5341cb19fbbSYork Sun return 125000000; 5351cb19fbbSYork Sun case QIXIS_SYSCLK_133: 5361cb19fbbSYork Sun return 133333333; 5371cb19fbbSYork Sun case QIXIS_SYSCLK_150: 5381cb19fbbSYork Sun return 150000000; 5391cb19fbbSYork Sun case QIXIS_SYSCLK_160: 5401cb19fbbSYork Sun return 160000000; 5411cb19fbbSYork Sun case QIXIS_SYSCLK_166: 5421cb19fbbSYork Sun return 166666666; 5431cb19fbbSYork Sun } 5441cb19fbbSYork Sun return 66666666; 5451cb19fbbSYork Sun } 5461cb19fbbSYork Sun 5471cb19fbbSYork Sun unsigned long get_board_ddr_clk(void) 5481cb19fbbSYork Sun { 5491cb19fbbSYork Sun u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); 5501cb19fbbSYork Sun #ifdef CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT 5511cb19fbbSYork Sun /* use accurate clock measurement */ 5521cb19fbbSYork Sun int freq = QIXIS_READ(clk_freq[2]) << 8 | QIXIS_READ(clk_freq[3]); 5531cb19fbbSYork Sun int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]); 5541cb19fbbSYork Sun u32 val; 5551cb19fbbSYork Sun 5561cb19fbbSYork Sun val = freq * base; 5571cb19fbbSYork Sun if (val) { 5581cb19fbbSYork Sun debug("DDR Clock measurement is: %d\n", val); 5591cb19fbbSYork Sun return val; 5601cb19fbbSYork Sun } else { 5611cb19fbbSYork Sun printf("Warning: DDR clock measurement is invalid, using value from brdcfg1.\n"); 5621cb19fbbSYork Sun } 5631cb19fbbSYork Sun #endif 5641cb19fbbSYork Sun 5651cb19fbbSYork Sun switch ((ddrclk_conf & 0x30) >> 4) { 5661cb19fbbSYork Sun case QIXIS_DDRCLK_100: 5671cb19fbbSYork Sun return 100000000; 5681cb19fbbSYork Sun case QIXIS_DDRCLK_125: 5691cb19fbbSYork Sun return 125000000; 5701cb19fbbSYork Sun case QIXIS_DDRCLK_133: 5711cb19fbbSYork Sun return 133333333; 5721cb19fbbSYork Sun } 5731cb19fbbSYork Sun return 66666666; 5741cb19fbbSYork Sun } 5751cb19fbbSYork Sun 5761cb19fbbSYork Sun static const char *serdes_clock_to_string(u32 clock) 5771cb19fbbSYork Sun { 5781cb19fbbSYork Sun switch (clock) { 5791cb19fbbSYork Sun case SRDS_PLLCR0_RFCK_SEL_100: 5801cb19fbbSYork Sun return "100"; 5811cb19fbbSYork Sun case SRDS_PLLCR0_RFCK_SEL_125: 5821cb19fbbSYork Sun return "125"; 5831cb19fbbSYork Sun case SRDS_PLLCR0_RFCK_SEL_156_25: 5841cb19fbbSYork Sun return "156.25"; 5851cb19fbbSYork Sun case SRDS_PLLCR0_RFCK_SEL_161_13: 5861cb19fbbSYork Sun return "161.1328125"; 5871cb19fbbSYork Sun default: 5881cb19fbbSYork Sun return "???"; 5891cb19fbbSYork Sun } 5901cb19fbbSYork Sun } 5911cb19fbbSYork Sun 5921cb19fbbSYork Sun int misc_init_r(void) 5931cb19fbbSYork Sun { 5941cb19fbbSYork Sun u8 sw; 5951cb19fbbSYork Sun serdes_corenet_t *srds_regs = 5961cb19fbbSYork Sun (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; 5971cb19fbbSYork Sun u32 actual[MAX_SERDES]; 5981cb19fbbSYork Sun unsigned int i; 5991cb19fbbSYork Sun 6001cb19fbbSYork Sun sw = QIXIS_READ(brdcfg[2]); 6011cb19fbbSYork Sun for (i = 0; i < MAX_SERDES; i++) { 6021cb19fbbSYork Sun unsigned int clock = (sw >> (6 - 2 * i)) & 3; 6031cb19fbbSYork Sun switch (clock) { 6041cb19fbbSYork Sun case 0: 6051cb19fbbSYork Sun actual[i] = SRDS_PLLCR0_RFCK_SEL_100; 6061cb19fbbSYork Sun break; 6071cb19fbbSYork Sun case 1: 6081cb19fbbSYork Sun actual[i] = SRDS_PLLCR0_RFCK_SEL_125; 6091cb19fbbSYork Sun break; 6101cb19fbbSYork Sun case 2: 6111cb19fbbSYork Sun actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25; 6121cb19fbbSYork Sun break; 6131cb19fbbSYork Sun case 3: 6141cb19fbbSYork Sun actual[i] = SRDS_PLLCR0_RFCK_SEL_161_13; 6151cb19fbbSYork Sun break; 6161cb19fbbSYork Sun } 6171cb19fbbSYork Sun } 6181cb19fbbSYork Sun 6191cb19fbbSYork Sun for (i = 0; i < MAX_SERDES; i++) { 6201cb19fbbSYork Sun u32 pllcr0 = srds_regs->bank[i].pllcr0; 6211cb19fbbSYork Sun u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; 6221cb19fbbSYork Sun if (expected != actual[i]) { 6231cb19fbbSYork Sun printf("Warning: SERDES%u expects reference clock %sMHz, but actual is %sMHz\n", 6241cb19fbbSYork Sun i + 1, serdes_clock_to_string(expected), 6251cb19fbbSYork Sun serdes_clock_to_string(actual[i])); 6261cb19fbbSYork Sun } 6271cb19fbbSYork Sun } 6281cb19fbbSYork Sun 6291cb19fbbSYork Sun return 0; 6301cb19fbbSYork Sun } 6311cb19fbbSYork Sun 6321cb19fbbSYork Sun void ft_board_setup(void *blob, bd_t *bd) 6331cb19fbbSYork Sun { 6341cb19fbbSYork Sun phys_addr_t base; 6351cb19fbbSYork Sun phys_size_t size; 6361cb19fbbSYork Sun 6371cb19fbbSYork Sun ft_cpu_setup(blob, bd); 6381cb19fbbSYork Sun 6391cb19fbbSYork Sun base = getenv_bootm_low(); 6401cb19fbbSYork Sun size = getenv_bootm_size(); 6411cb19fbbSYork Sun 6421cb19fbbSYork Sun fdt_fixup_memory(blob, (u64)base, (u64)size); 6431cb19fbbSYork Sun 6441cb19fbbSYork Sun #ifdef CONFIG_PCI 6451cb19fbbSYork Sun pci_of_setup(blob, bd); 6461cb19fbbSYork Sun #endif 6471cb19fbbSYork Sun 6481cb19fbbSYork Sun fdt_fixup_liodn(blob); 6491cb19fbbSYork Sun fdt_fixup_dr_usb(blob, bd); 6501cb19fbbSYork Sun 6511cb19fbbSYork Sun #ifdef CONFIG_SYS_DPAA_FMAN 6521cb19fbbSYork Sun fdt_fixup_fman_ethernet(blob); 6531cb19fbbSYork Sun fdt_fixup_board_enet(blob); 6541cb19fbbSYork Sun #endif 6551cb19fbbSYork Sun } 6561cb19fbbSYork Sun 6571cb19fbbSYork Sun /* 6581cb19fbbSYork Sun * This function is called by bdinfo to print detail board information. 6591cb19fbbSYork Sun * As an exmaple for future board, we organize the messages into 6601cb19fbbSYork Sun * several sections. If applicable, the message is in the format of 6611cb19fbbSYork Sun * <name> = <value> 6621cb19fbbSYork Sun * It should aligned with normal output of bdinfo command. 6631cb19fbbSYork Sun * 6641cb19fbbSYork Sun * Voltage: Core, DDR and another configurable voltages 6651cb19fbbSYork Sun * Clock : Critical clocks which are not printed already 6661cb19fbbSYork Sun * RCW : RCW source if not printed already 6671cb19fbbSYork Sun * Misc : Other important information not in above catagories 6681cb19fbbSYork Sun */ 6691cb19fbbSYork Sun void board_detail(void) 6701cb19fbbSYork Sun { 6711cb19fbbSYork Sun int i; 6721cb19fbbSYork Sun u8 brdcfg[16], dutcfg[16], rst_ctl; 6731cb19fbbSYork Sun int vdd, rcwsrc; 6741cb19fbbSYork Sun static const char * const clk[] = {"66.67", "100", "125", "133.33"}; 6751cb19fbbSYork Sun 6761cb19fbbSYork Sun for (i = 0; i < 16; i++) { 6771cb19fbbSYork Sun brdcfg[i] = qixis_read(offsetof(struct qixis, brdcfg[0]) + i); 6781cb19fbbSYork Sun dutcfg[i] = qixis_read(offsetof(struct qixis, dutcfg[0]) + i); 6791cb19fbbSYork Sun } 6801cb19fbbSYork Sun 6811cb19fbbSYork Sun /* Voltage secion */ 6821cb19fbbSYork Sun if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR)) { 6831cb19fbbSYork Sun vdd = read_voltage(); 6841cb19fbbSYork Sun if (vdd > 0) 6851cb19fbbSYork Sun printf("Core voltage= %d mV\n", vdd); 6861cb19fbbSYork Sun select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); 6871cb19fbbSYork Sun } 6881cb19fbbSYork Sun 6891cb19fbbSYork Sun printf("XVDD = 1.%d V\n", ((brdcfg[8] & 0xf) - 4) * 5 + 25); 6901cb19fbbSYork Sun 6911cb19fbbSYork Sun /* clock section */ 6921cb19fbbSYork Sun printf("SYSCLK = %s MHz\nDDRCLK = %s MHz\n", 6931cb19fbbSYork Sun clk[(brdcfg[11] >> 2) & 0x3], clk[brdcfg[11] & 3]); 6941cb19fbbSYork Sun 6951cb19fbbSYork Sun /* RCW section */ 6961cb19fbbSYork Sun rcwsrc = (dutcfg[0] << 1) + (dutcfg[1] & 1); 6971cb19fbbSYork Sun puts("RCW source = "); 6981cb19fbbSYork Sun switch (rcwsrc) { 6991cb19fbbSYork Sun case 0x017: 7001cb19fbbSYork Sun case 0x01f: 7011cb19fbbSYork Sun puts("8-bit NOR\n"); 7021cb19fbbSYork Sun break; 7031cb19fbbSYork Sun case 0x027: 7041cb19fbbSYork Sun case 0x02F: 7051cb19fbbSYork Sun puts("16-bit NOR\n"); 7061cb19fbbSYork Sun break; 7071cb19fbbSYork Sun case 0x040: 7081cb19fbbSYork Sun puts("SDHC/eMMC\n"); 7091cb19fbbSYork Sun break; 7101cb19fbbSYork Sun case 0x044: 7111cb19fbbSYork Sun puts("SPI 16-bit addressing\n"); 7121cb19fbbSYork Sun break; 7131cb19fbbSYork Sun case 0x045: 7141cb19fbbSYork Sun puts("SPI 24-bit addressing\n"); 7151cb19fbbSYork Sun break; 7161cb19fbbSYork Sun case 0x048: 7171cb19fbbSYork Sun puts("I2C normal addressing\n"); 7181cb19fbbSYork Sun break; 7191cb19fbbSYork Sun case 0x049: 7201cb19fbbSYork Sun puts("I2C extended addressing\n"); 7211cb19fbbSYork Sun break; 7221cb19fbbSYork Sun case 0x108: 7231cb19fbbSYork Sun case 0x109: 7241cb19fbbSYork Sun case 0x10a: 7251cb19fbbSYork Sun case 0x10b: 7261cb19fbbSYork Sun puts("8-bit NAND, 2KB\n"); 7271cb19fbbSYork Sun break; 7281cb19fbbSYork Sun default: 7291cb19fbbSYork Sun if ((rcwsrc >= 0x080) && (rcwsrc <= 0x09f)) 7301cb19fbbSYork Sun puts("Hard-coded RCW\n"); 7311cb19fbbSYork Sun else if ((rcwsrc >= 0x110) && (rcwsrc <= 0x11f)) 7321cb19fbbSYork Sun puts("8-bit NAND, 4KB\n"); 7331cb19fbbSYork Sun else 7341cb19fbbSYork Sun puts("unknown\n"); 7351cb19fbbSYork Sun break; 7361cb19fbbSYork Sun } 7371cb19fbbSYork Sun 7381cb19fbbSYork Sun /* Misc section */ 7391cb19fbbSYork Sun rst_ctl = QIXIS_READ(rst_ctl); 7401cb19fbbSYork Sun puts("HRESET_REQ = "); 7411cb19fbbSYork Sun switch (rst_ctl & 0x30) { 7421cb19fbbSYork Sun case 0x00: 7431cb19fbbSYork Sun puts("Ignored\n"); 7441cb19fbbSYork Sun break; 7451cb19fbbSYork Sun case 0x10: 7461cb19fbbSYork Sun puts("Assert HRESET\n"); 7471cb19fbbSYork Sun break; 7481cb19fbbSYork Sun case 0x30: 7491cb19fbbSYork Sun puts("Reset system\n"); 7501cb19fbbSYork Sun break; 7511cb19fbbSYork Sun default: 7521cb19fbbSYork Sun puts("N/A\n"); 7531cb19fbbSYork Sun break; 7541cb19fbbSYork Sun } 7551cb19fbbSYork Sun } 7561cb19fbbSYork Sun 7571cb19fbbSYork Sun /* 7581cb19fbbSYork Sun * Reverse engineering switch settings. 7591cb19fbbSYork Sun * Some bits cannot be figured out. They will be displayed as 7601cb19fbbSYork Sun * underscore in binary format. mask[] has those bits. 7611cb19fbbSYork Sun * Some bits are calculated differently than the actual switches 7621cb19fbbSYork Sun * if booting with overriding by FPGA. 7631cb19fbbSYork Sun */ 7641cb19fbbSYork Sun void qixis_dump_switch(void) 7651cb19fbbSYork Sun { 7661cb19fbbSYork Sun int i; 7671cb19fbbSYork Sun u8 sw[9]; 7681cb19fbbSYork Sun 7691cb19fbbSYork Sun /* 7701cb19fbbSYork Sun * Any bit with 1 means that bit cannot be reverse engineered. 7711cb19fbbSYork Sun * It will be displayed as _ in binary format. 7721cb19fbbSYork Sun */ 7731cb19fbbSYork Sun static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xcf, 0x3f, 0x1f}; 7741cb19fbbSYork Sun char buf[10]; 7751cb19fbbSYork Sun u8 brdcfg[16], dutcfg[16]; 7761cb19fbbSYork Sun 7771cb19fbbSYork Sun for (i = 0; i < 16; i++) { 7781cb19fbbSYork Sun brdcfg[i] = qixis_read(offsetof(struct qixis, brdcfg[0]) + i); 7791cb19fbbSYork Sun dutcfg[i] = qixis_read(offsetof(struct qixis, dutcfg[0]) + i); 7801cb19fbbSYork Sun } 7811cb19fbbSYork Sun 7821cb19fbbSYork Sun sw[0] = dutcfg[0]; 7831cb19fbbSYork Sun sw[1] = (dutcfg[1] << 0x07) | 7841cb19fbbSYork Sun ((dutcfg[12] & 0xC0) >> 1) | 7851cb19fbbSYork Sun ((dutcfg[11] & 0xE0) >> 3) | 7861cb19fbbSYork Sun ((dutcfg[6] & 0x80) >> 6) | 7871cb19fbbSYork Sun ((dutcfg[1] & 0x80) >> 7); 7881cb19fbbSYork Sun sw[2] = ((brdcfg[1] & 0x0f) << 4) | 7891cb19fbbSYork Sun ((brdcfg[1] & 0x30) >> 2) | 7901cb19fbbSYork Sun ((brdcfg[1] & 0x40) >> 5) | 7911cb19fbbSYork Sun ((brdcfg[1] & 0x80) >> 7); 7921cb19fbbSYork Sun sw[3] = brdcfg[2]; 7931cb19fbbSYork Sun sw[4] = ((dutcfg[2] & 0x01) << 7) | 7941cb19fbbSYork Sun ((dutcfg[2] & 0x06) << 4) | 7951cb19fbbSYork Sun ((~QIXIS_READ(present)) & 0x10) | 7961cb19fbbSYork Sun ((brdcfg[3] & 0x80) >> 4) | 7971cb19fbbSYork Sun ((brdcfg[3] & 0x01) << 2) | 7981cb19fbbSYork Sun ((brdcfg[6] == 0x62) ? 3 : 7991cb19fbbSYork Sun ((brdcfg[6] == 0x5a) ? 2 : 8001cb19fbbSYork Sun ((brdcfg[6] == 0x5e) ? 1 : 0))); 8011cb19fbbSYork Sun sw[5] = ((brdcfg[0] & 0x0f) << 4) | 8021cb19fbbSYork Sun ((QIXIS_READ(rst_ctl) & 0x30) >> 2) | 8031cb19fbbSYork Sun ((brdcfg[0] & 0x40) >> 5); 8041cb19fbbSYork Sun sw[6] = (brdcfg[11] & 0x20) | 8051cb19fbbSYork Sun ((brdcfg[5] & 0x02) << 3); 8061cb19fbbSYork Sun sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | 8071cb19fbbSYork Sun ((brdcfg[5] & 0x10) << 2); 8081cb19fbbSYork Sun sw[8] = ((brdcfg[12] & 0x08) << 4) | 8091cb19fbbSYork Sun ((brdcfg[12] & 0x03) << 5); 8101cb19fbbSYork Sun 8111cb19fbbSYork Sun puts("DIP switch (reverse-engineering)\n"); 8121cb19fbbSYork Sun for (i = 0; i < 9; i++) { 8131cb19fbbSYork Sun printf("SW%d = 0b%s (0x%02x)\n", 8141cb19fbbSYork Sun i + 1, byte_to_binary_mask(sw[i], mask[i], buf), sw[i]); 8151cb19fbbSYork Sun } 8161cb19fbbSYork Sun } 8171cb19fbbSYork Sun 8181cb19fbbSYork Sun static int do_vdd_adjust(cmd_tbl_t *cmdtp, 8191cb19fbbSYork Sun int flag, int argc, 8201cb19fbbSYork Sun char * const argv[]) 8211cb19fbbSYork Sun { 8221cb19fbbSYork Sun ulong override; 8231cb19fbbSYork Sun 8241cb19fbbSYork Sun if (argc < 2) 8251cb19fbbSYork Sun return CMD_RET_USAGE; 8261cb19fbbSYork Sun if (!strict_strtoul(argv[1], 10, &override)) 8271cb19fbbSYork Sun adjust_vdd(override); /* the value is checked by callee */ 8281cb19fbbSYork Sun else 8291cb19fbbSYork Sun return CMD_RET_USAGE; 8301cb19fbbSYork Sun 8311cb19fbbSYork Sun return 0; 8321cb19fbbSYork Sun } 8331cb19fbbSYork Sun 8341cb19fbbSYork Sun U_BOOT_CMD( 8351cb19fbbSYork Sun vdd_override, 2, 0, do_vdd_adjust, 8361cb19fbbSYork Sun "Override VDD", 8371cb19fbbSYork Sun "- override with the voltage specified in mV, eg. 1050" 8381cb19fbbSYork Sun ); 839