xref: /openbmc/u-boot/board/freescale/t208xrdb/spl.c (revision ae485b54)
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2013 Freescale Semiconductor, Inc.
3  */
4 
5 #include <common.h>
6 #include <console.h>
7 #include <environment.h>
8 #include <malloc.h>
9 #include <ns16550.h>
10 #include <nand.h>
11 #include <i2c.h>
12 #include <mmc.h>
13 #include <fsl_esdhc.h>
14 #include <spi_flash.h>
15 #include "../common/spl.h"
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 phys_size_t get_effective_memsize(void)
20 {
21 	return CONFIG_SYS_L3_SIZE;
22 }
23 
24 unsigned long get_board_sys_clk(void)
25 {
26 	return CONFIG_SYS_CLK_FREQ;
27 }
28 
29 unsigned long get_board_ddr_clk(void)
30 {
31 	return CONFIG_DDR_CLK_FREQ;
32 }
33 
34 void board_init_f(ulong bootflag)
35 {
36 	u32 plat_ratio, sys_clk, ccb_clk;
37 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
38 
39 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
40 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
41 
42 	/* Update GD pointer */
43 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
44 
45 	console_init_f();
46 
47 	/* initialize selected port with appropriate baud rate */
48 	sys_clk = get_board_sys_clk();
49 	plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
50 	ccb_clk = sys_clk * plat_ratio / 2;
51 
52 	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
53 		     ccb_clk / 16 / CONFIG_BAUDRATE);
54 
55 #if defined(CONFIG_SPL_MMC_BOOT)
56 	puts("\nSD boot...\n");
57 #elif defined(CONFIG_SPL_SPI_BOOT)
58 	puts("\nSPI boot...\n");
59 #elif defined(CONFIG_SPL_NAND_BOOT)
60 	puts("\nNAND boot...\n");
61 #endif
62 
63 	relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
64 }
65 
66 void board_init_r(gd_t *gd, ulong dest_addr)
67 {
68 	bd_t *bd;
69 
70 	bd = (bd_t *)(gd + sizeof(gd_t));
71 	memset(bd, 0, sizeof(bd_t));
72 	gd->bd = bd;
73 	bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
74 	bd->bi_memsize = CONFIG_SYS_L3_SIZE;
75 
76 	arch_cpu_init();
77 	get_clocks();
78 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
79 			CONFIG_SPL_RELOC_MALLOC_SIZE);
80 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
81 
82 #ifdef CONFIG_SPL_NAND_BOOT
83 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
84 			    (uchar *)CONFIG_ENV_ADDR);
85 #endif
86 #ifdef CONFIG_SPL_MMC_BOOT
87 	mmc_initialize(bd);
88 	mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
89 			   (uchar *)CONFIG_ENV_ADDR);
90 #endif
91 #ifdef CONFIG_SPL_SPI_BOOT
92 	fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
93 			       (uchar *)CONFIG_ENV_ADDR);
94 #endif
95 
96 	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
97 	gd->env_valid = ENV_VALID;
98 
99 	i2c_init_all();
100 
101 	dram_init();
102 
103 #ifdef CONFIG_SPL_MMC_BOOT
104 	mmc_boot();
105 #elif defined(CONFIG_SPL_SPI_BOOT)
106 	fsl_spi_boot();
107 #elif defined(CONFIG_SPL_NAND_BOOT)
108 	nand_boot();
109 #endif
110 }
111