1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <command.h>
9 #include <netdev.h>
10 #include <linux/compiler.h>
11 #include <asm/mmu.h>
12 #include <asm/processor.h>
13 #include <asm/cache.h>
14 #include <asm/immap_85xx.h>
15 #include <asm/fsl_law.h>
16 #include <asm/fsl_serdes.h>
17 #include <asm/fsl_portals.h>
18 #include <asm/fsl_liodn.h>
19 #include <fm_eth.h>
20 #include <asm/mpc85xx_gpio.h>
21 
22 #include "t104xrdb.h"
23 #include "cpld.h"
24 
25 DECLARE_GLOBAL_DATA_PTR;
26 
27 int checkboard(void)
28 {
29 	struct cpu_type *cpu = gd->arch.cpu;
30 	u8 sw;
31 
32 	printf("Board: %sRDB\n", cpu->name);
33 	printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
34 	       CPLD_READ(hw_ver), CPLD_READ(sw_ver));
35 
36 	sw = CPLD_READ(flash_ctl_status);
37 	sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
38 
39 	if (sw <= 7)
40 		printf("vBank: %d\n", sw);
41 	else
42 		printf("Unsupported Bank=%x\n", sw);
43 
44 	return 0;
45 }
46 
47 int board_early_init_r(void)
48 {
49 #ifdef CONFIG_SYS_FLASH_BASE
50 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
51 	const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
52 
53 	/*
54 	 * Remap Boot flash region to caching-inhibited
55 	 * so that flash can be erased properly.
56 	 */
57 
58 	/* Flush d-cache and invalidate i-cache of any FLASH data */
59 	flush_dcache();
60 	invalidate_icache();
61 
62 	/* invalidate existing TLB entry for flash */
63 	disable_tlb(flash_esel);
64 
65 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
66 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
67 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
68 #endif
69 	set_liodns();
70 #ifdef CONFIG_SYS_DPAA_QBMAN
71 	setup_portals();
72 #endif
73 
74 	return 0;
75 }
76 
77 int misc_init_r(void)
78 {
79 	return 0;
80 }
81 
82 void ft_board_setup(void *blob, bd_t *bd)
83 {
84 	phys_addr_t base;
85 	phys_size_t size;
86 
87 	ft_cpu_setup(blob, bd);
88 
89 	base = getenv_bootm_low();
90 	size = getenv_bootm_size();
91 
92 	fdt_fixup_memory(blob, (u64)base, (u64)size);
93 
94 #ifdef CONFIG_PCI
95 	pci_of_setup(blob, bd);
96 #endif
97 
98 	fdt_fixup_liodn(blob);
99 
100 #ifdef CONFIG_HAS_FSL_DR_USB
101 	fdt_fixup_dr_usb(blob, bd);
102 #endif
103 
104 #ifdef CONFIG_SYS_DPAA_FMAN
105 	fdt_fixup_fman_ethernet(blob);
106 #endif
107 }
108 
109 #ifdef CONFIG_DEEP_SLEEP
110 void board_mem_sleep_setup(void)
111 {
112 	/* does not provide HW signals for power management */
113 	CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
114 	/* Disable MCKE isolation */
115 	gpio_set_value(2, 0);
116 	udelay(1);
117 }
118 #endif
119