118c01445SPrabhakar Kushwaha#PBI commands 2*0921de67SPriyanka Jain#Software Workaround for errata A-007662 to train PCIe2 controller in Gen2 speed 3*0921de67SPriyanka Jain09250100 00000400 4*0921de67SPriyanka Jain09250108 00002000 5*0921de67SPriyanka Jain#Software Workaround for errata A-008007 to reset PVR register 6*0921de67SPriyanka Jain09000010 0000000b 7*0921de67SPriyanka Jain09000014 c0000000 8*0921de67SPriyanka Jain09000018 81d00017 9*0921de67SPriyanka Jain89020400 a1000000 10*0921de67SPriyanka Jain091380c0 000f0000 11*0921de67SPriyanka Jain89020400 00000000 1218c01445SPrabhakar Kushwaha#Initialize CPC1 1318c01445SPrabhakar Kushwaha09010000 00200400 1418c01445SPrabhakar Kushwaha09138000 00000000 1518c01445SPrabhakar Kushwaha091380c0 00000100 1618c01445SPrabhakar Kushwaha#Configure CPC1 as 256KB SRAM 1718c01445SPrabhakar Kushwaha09010100 00000000 1818c01445SPrabhakar Kushwaha09010104 fffc0007 1918c01445SPrabhakar Kushwaha09010f00 08000000 2018c01445SPrabhakar Kushwaha09010000 80000000 2118c01445SPrabhakar Kushwaha#Configure LAW for CPC1 2218c01445SPrabhakar Kushwaha09000cd0 00000000 2318c01445SPrabhakar Kushwaha09000cd4 fffc0000 2418c01445SPrabhakar Kushwaha09000cd8 81000011 2518c01445SPrabhakar Kushwaha#Configure alternate space 2618c01445SPrabhakar Kushwaha09000010 00000000 2718c01445SPrabhakar Kushwaha09000014 ff000000 2818c01445SPrabhakar Kushwaha09000018 81000000 2918c01445SPrabhakar Kushwaha#Configure SPI controller 3018c01445SPrabhakar Kushwaha09110000 80000403 3118c01445SPrabhakar Kushwaha09110020 2d170008 3218c01445SPrabhakar Kushwaha09110024 00100008 3318c01445SPrabhakar Kushwaha09110028 00100008 3418c01445SPrabhakar Kushwaha0911002c 00100008 3518c01445SPrabhakar Kushwaha#Flush PBL data 3618c01445SPrabhakar Kushwaha091380c0 000FFFFF 37