1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <netdev.h> 9 #include <asm/immap_85xx.h> 10 #include <fm_eth.h> 11 #include <fsl_mdio.h> 12 #include <malloc.h> 13 #include <asm/fsl_dtsec.h> 14 15 #include "../common/fman.h" 16 17 int board_eth_init(bd_t *bis) 18 { 19 #ifdef CONFIG_FMAN_ENET 20 struct memac_mdio_info memac_mdio_info; 21 unsigned int i; 22 int phy_addr = 0; 23 printf("Initializing Fman\n"); 24 25 memac_mdio_info.regs = 26 (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR; 27 memac_mdio_info.name = DEFAULT_FM_MDIO_NAME; 28 29 /* Register the real 1G MDIO bus */ 30 fm_memac_mdio_init(bis, &memac_mdio_info); 31 32 /* 33 * Program on board RGMII, SGMII PHY addresses. 34 */ 35 for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { 36 int idx = i - FM1_DTSEC1; 37 38 switch (fm_info_get_enet_if(i)) { 39 #ifdef CONFIG_T1040RDB 40 case PHY_INTERFACE_MODE_SGMII: 41 /* T1040RDB only supports SGMII on DTSEC3 */ 42 fm_info_set_phy_address(FM1_DTSEC3, 43 CONFIG_SYS_SGMII1_PHY_ADDR); 44 #endif 45 case PHY_INTERFACE_MODE_RGMII: 46 if (FM1_DTSEC4 == i) 47 phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; 48 if (FM1_DTSEC5 == i) 49 phy_addr = CONFIG_SYS_RGMII2_PHY_ADDR; 50 fm_info_set_phy_address(i, phy_addr); 51 break; 52 case PHY_INTERFACE_MODE_QSGMII: 53 fm_info_set_phy_address(i, 0); 54 break; 55 case PHY_INTERFACE_MODE_NONE: 56 fm_info_set_phy_address(i, 0); 57 break; 58 default: 59 printf("Fman1: DTSEC%u set to unknown interface %i\n", 60 idx + 1, fm_info_get_enet_if(i)); 61 fm_info_set_phy_address(i, 0); 62 break; 63 } 64 fm_info_set_mdio(i, 65 miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME)); 66 } 67 68 cpu_eth_init(bis); 69 #endif 70 71 return pci_eth_init(bis); 72 } 73