1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __T1040QDS_QIXIS_H__ 8 #define __T1040QDS_QIXIS_H__ 9 10 /* Definitions of QIXIS Registers for T1040QDS */ 11 12 /* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ 13 #define BRDCFG4_EMISEL_MASK 0xE0 14 #define BRDCFG4_EMISEL_SHIFT 5 15 16 /* BRDCFG5[0:1] controls routing and use of I2C3 & I2C4 ports*/ 17 #define BRDCFG5_IMX_MASK 0xC0 18 #define BRDCFG5_IMX_DIU 0x80 19 20 /* BRDCFG15[3] controls LCD Panel Powerdown*/ 21 #define BRDCFG15_LCDPD_MASK 0x10 22 #define BRDCFG15_LCDPD_ENABLED 0x00 23 24 /* BRDCFG15[6:7] controls DIU MUX selction*/ 25 #define BRDCFG15_DIUSEL_MASK 0x03 26 #define BRDCFG15_DIUSEL_HDMI 0x00 27 28 /* SYSCLK */ 29 #define QIXIS_SYSCLK_66 0x0 30 #define QIXIS_SYSCLK_83 0x1 31 #define QIXIS_SYSCLK_100 0x2 32 #define QIXIS_SYSCLK_125 0x3 33 #define QIXIS_SYSCLK_133 0x4 34 #define QIXIS_SYSCLK_150 0x5 35 #define QIXIS_SYSCLK_160 0x6 36 #define QIXIS_SYSCLK_166 0x7 37 #define QIXIS_SYSCLK_64 0x8 38 39 /* DDRCLK */ 40 #define QIXIS_DDRCLK_66 0x0 41 #define QIXIS_DDRCLK_100 0x1 42 #define QIXIS_DDRCLK_125 0x2 43 #define QIXIS_DDRCLK_133 0x3 44 45 46 #define QIXIS_SRDS1CLK_122 0x5a 47 #define QIXIS_SRDS1CLK_125 0x5e 48 #endif 49