1*439fbe75SPrabhakar Kushwaha#PBI commands 2*439fbe75SPrabhakar Kushwaha#Initialize CPC1 3*439fbe75SPrabhakar Kushwaha09010000 00200400 4*439fbe75SPrabhakar Kushwaha09138000 00000000 5*439fbe75SPrabhakar Kushwaha091380c0 00000100 6*439fbe75SPrabhakar Kushwaha#Configure CPC1 as 512KB SRAM 7*439fbe75SPrabhakar Kushwaha09010100 00000000 8*439fbe75SPrabhakar Kushwaha09010104 fffc0007 9*439fbe75SPrabhakar Kushwaha09010f00 08000000 10*439fbe75SPrabhakar Kushwaha09010000 80000000 11*439fbe75SPrabhakar Kushwaha#Configure LAW for CPC1 12*439fbe75SPrabhakar Kushwaha09000cf0 00000000 13*439fbe75SPrabhakar Kushwaha09000cf4 fffc0000 14*439fbe75SPrabhakar Kushwaha09000cf8 81000011 15*439fbe75SPrabhakar Kushwaha#Configure alternate space 16*439fbe75SPrabhakar Kushwaha09000010 00000000 17*439fbe75SPrabhakar Kushwaha09000014 ff000000 18*439fbe75SPrabhakar Kushwaha09000018 81000000 19*439fbe75SPrabhakar Kushwaha#Configure SPI controller 20*439fbe75SPrabhakar Kushwaha09110000 80000403 21*439fbe75SPrabhakar Kushwaha09110020 2d170008 22*439fbe75SPrabhakar Kushwaha09110024 00100008 23*439fbe75SPrabhakar Kushwaha09110028 00100008 24*439fbe75SPrabhakar Kushwaha0911002c 00100008 25*439fbe75SPrabhakar Kushwaha#Flush PBL data 26*439fbe75SPrabhakar Kushwaha09138000 00000000 27*439fbe75SPrabhakar Kushwaha091380c0 00000000 28