1*48c6f328SShengzhou Liu#PBI commands 2*48c6f328SShengzhou Liu#Initialize CPC1 3*48c6f328SShengzhou Liu09010000 00200400 4*48c6f328SShengzhou Liu09138000 00000000 5*48c6f328SShengzhou Liu091380c0 00000100 6*48c6f328SShengzhou Liu#Configure CPC1 as 256KB SRAM 7*48c6f328SShengzhou Liu09010100 00000000 8*48c6f328SShengzhou Liu09010104 fffc0007 9*48c6f328SShengzhou Liu09010f00 08000000 10*48c6f328SShengzhou Liu09010000 80000000 11*48c6f328SShengzhou Liu#Configure LAW for CPC1 12*48c6f328SShengzhou Liu09000cd0 00000000 13*48c6f328SShengzhou Liu09000cd4 fffc0000 14*48c6f328SShengzhou Liu09000cd8 81000011 15*48c6f328SShengzhou Liu#Configure alternate space 16*48c6f328SShengzhou Liu09000010 00000000 17*48c6f328SShengzhou Liu09000014 ff000000 18*48c6f328SShengzhou Liu09000018 81000000 19*48c6f328SShengzhou Liu#Configure SPI controller 20*48c6f328SShengzhou Liu09110000 80000403 21*48c6f328SShengzhou Liu09110020 2d170008 22*48c6f328SShengzhou Liu09110024 00100008 23*48c6f328SShengzhou Liu09110028 00100008 24*48c6f328SShengzhou Liu0911002c 00100008 25*48c6f328SShengzhou Liu#Flush PBL data 26*48c6f328SShengzhou Liu091380c0 000FFFFF 27