1 /* Copyright 2014 Freescale Semiconductor, Inc. 2 * 3 * SPDX-License-Identifier: GPL-2.0+ 4 */ 5 6 #include <common.h> 7 #include <console.h> 8 #include <malloc.h> 9 #include <ns16550.h> 10 #include <nand.h> 11 #include <i2c.h> 12 #include <mmc.h> 13 #include <fsl_esdhc.h> 14 #include <spi_flash.h> 15 #include "../common/sleep.h" 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 phys_size_t get_effective_memsize(void) 20 { 21 return CONFIG_SYS_L3_SIZE; 22 } 23 24 unsigned long get_board_sys_clk(void) 25 { 26 return CONFIG_SYS_CLK_FREQ; 27 } 28 29 unsigned long get_board_ddr_clk(void) 30 { 31 return CONFIG_DDR_CLK_FREQ; 32 } 33 34 #if defined(CONFIG_SPL_MMC_BOOT) 35 #define GPIO1_SD_SEL 0x00020000 36 int board_mmc_getcd(struct mmc *mmc) 37 { 38 ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); 39 u32 val = in_be32(&pgpio->gpdat); 40 41 /* GPIO1_14, 0: eMMC, 1: SD */ 42 val &= GPIO1_SD_SEL; 43 44 return val ? -1 : 1; 45 } 46 47 int board_mmc_getwp(struct mmc *mmc) 48 { 49 ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); 50 u32 val = in_be32(&pgpio->gpdat); 51 52 val &= GPIO1_SD_SEL; 53 54 return val ? -1 : 0; 55 } 56 #endif 57 58 void board_init_f(ulong bootflag) 59 { 60 u32 plat_ratio, sys_clk, ccb_clk; 61 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 62 63 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ 64 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); 65 66 /* Update GD pointer */ 67 gd = (gd_t *)(CONFIG_SPL_GD_ADDR); 68 69 console_init_f(); 70 71 #ifdef CONFIG_DEEP_SLEEP 72 /* disable the console if boot from deep sleep */ 73 if (is_warm_boot()) 74 fsl_dp_disable_console(); 75 #endif 76 77 /* initialize selected port with appropriate baud rate */ 78 sys_clk = get_board_sys_clk(); 79 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; 80 ccb_clk = sys_clk * plat_ratio / 2; 81 82 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 83 ccb_clk / 16 / CONFIG_BAUDRATE); 84 85 #if defined(CONFIG_SPL_MMC_BOOT) 86 puts("\nSD boot...\n"); 87 #elif defined(CONFIG_SPL_SPI_BOOT) 88 puts("\nSPI boot...\n"); 89 #elif defined(CONFIG_SPL_NAND_BOOT) 90 puts("\nNAND boot...\n"); 91 #endif 92 93 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); 94 } 95 96 void board_init_r(gd_t *gd, ulong dest_addr) 97 { 98 bd_t *bd; 99 100 bd = (bd_t *)(gd + sizeof(gd_t)); 101 memset(bd, 0, sizeof(bd_t)); 102 gd->bd = bd; 103 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; 104 bd->bi_memsize = CONFIG_SYS_L3_SIZE; 105 106 probecpu(); 107 get_clocks(); 108 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 109 CONFIG_SPL_RELOC_MALLOC_SIZE); 110 111 #ifdef CONFIG_SPL_NAND_BOOT 112 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 113 (uchar *)CONFIG_ENV_ADDR); 114 #endif 115 #ifdef CONFIG_SPL_MMC_BOOT 116 mmc_initialize(bd); 117 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 118 (uchar *)CONFIG_ENV_ADDR); 119 #endif 120 #ifdef CONFIG_SPL_SPI_BOOT 121 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 122 (uchar *)CONFIG_ENV_ADDR); 123 #endif 124 125 gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 126 gd->env_valid = 1; 127 128 i2c_init_all(); 129 130 gd->ram_size = initdram(0); 131 132 #ifdef CONFIG_SPL_MMC_BOOT 133 mmc_boot(); 134 #elif defined(CONFIG_SPL_SPI_BOOT) 135 spi_boot(); 136 #elif defined(CONFIG_SPL_NAND_BOOT) 137 nand_boot(); 138 #endif 139 } 140