xref: /openbmc/u-boot/board/freescale/t102xrdb/spl.c (revision 29b103c7)
1 /* Copyright 2014 Freescale Semiconductor, Inc.
2  *
3  * SPDX-License-Identifier:    GPL-2.0+
4  */
5 
6 #include <common.h>
7 #include <malloc.h>
8 #include <ns16550.h>
9 #include <nand.h>
10 #include <i2c.h>
11 #include <mmc.h>
12 #include <fsl_esdhc.h>
13 #include <spi_flash.h>
14 #include "../common/sleep.h"
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 phys_size_t get_effective_memsize(void)
19 {
20 	return CONFIG_SYS_L3_SIZE;
21 }
22 
23 unsigned long get_board_sys_clk(void)
24 {
25 	return CONFIG_SYS_CLK_FREQ;
26 }
27 
28 unsigned long get_board_ddr_clk(void)
29 {
30 	return CONFIG_DDR_CLK_FREQ;
31 }
32 
33 void board_init_f(ulong bootflag)
34 {
35 	u32 plat_ratio, sys_clk, ccb_clk;
36 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
37 
38 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
39 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
40 
41 	/* Update GD pointer */
42 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
43 
44 	console_init_f();
45 
46 #ifdef CONFIG_DEEP_SLEEP
47 	/* disable the console if boot from deep sleep */
48 	if (is_warm_boot())
49 		fsl_dp_disable_console();
50 #endif
51 
52 	/* initialize selected port with appropriate baud rate */
53 	sys_clk = get_board_sys_clk();
54 	plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
55 	ccb_clk = sys_clk * plat_ratio / 2;
56 
57 	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
58 		     ccb_clk / 16 / CONFIG_BAUDRATE);
59 
60 #if defined(CONFIG_SPL_MMC_BOOT)
61 	puts("\nSD boot...\n");
62 #elif defined(CONFIG_SPL_SPI_BOOT)
63 	puts("\nSPI boot...\n");
64 #elif defined(CONFIG_SPL_NAND_BOOT)
65 	puts("\nNAND boot...\n");
66 #endif
67 
68 	relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
69 }
70 
71 void board_init_r(gd_t *gd, ulong dest_addr)
72 {
73 	bd_t *bd;
74 
75 	bd = (bd_t *)(gd + sizeof(gd_t));
76 	memset(bd, 0, sizeof(bd_t));
77 	gd->bd = bd;
78 	bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
79 	bd->bi_memsize = CONFIG_SYS_L3_SIZE;
80 
81 	probecpu();
82 	get_clocks();
83 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
84 			CONFIG_SPL_RELOC_MALLOC_SIZE);
85 
86 #ifdef CONFIG_SPL_NAND_BOOT
87 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
88 			    (uchar *)CONFIG_ENV_ADDR);
89 #endif
90 #ifdef CONFIG_SPL_MMC_BOOT
91 	mmc_initialize(bd);
92 	mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
93 			   (uchar *)CONFIG_ENV_ADDR);
94 #endif
95 #ifdef CONFIG_SPL_SPI_BOOT
96 	spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
97 			   (uchar *)CONFIG_ENV_ADDR);
98 #endif
99 
100 	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
101 	gd->env_valid = 1;
102 
103 	i2c_init_all();
104 
105 	gd->ram_size = initdram(0);
106 
107 #ifdef CONFIG_SPL_MMC_BOOT
108 	mmc_boot();
109 #elif defined(CONFIG_SPL_SPI_BOOT)
110 	spi_boot();
111 #elif defined(CONFIG_SPL_NAND_BOOT)
112 	nand_boot();
113 #endif
114 }
115