1*94a45bb1SScott Wood /* 2*94a45bb1SScott Wood * Copyright 2011 Freescale Semiconductor, Inc. 3*94a45bb1SScott Wood * 4*94a45bb1SScott Wood * This program is free software; you can redistribute it and/or 5*94a45bb1SScott Wood * modify it under the terms of the GNU General Public License as 6*94a45bb1SScott Wood * published by the Free Software Foundation; either version 2 of 7*94a45bb1SScott Wood * the License, or (at your option) any later version. 8*94a45bb1SScott Wood * 9*94a45bb1SScott Wood * This program is distributed in the hope that it will be useful, 10*94a45bb1SScott Wood * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*94a45bb1SScott Wood * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*94a45bb1SScott Wood * 13*94a45bb1SScott Wood * GNU General Public License for more details. 14*94a45bb1SScott Wood * 15*94a45bb1SScott Wood * You should have received a copy of the GNU General Public License 16*94a45bb1SScott Wood * along with this program; if not, write to the Free Software 17*94a45bb1SScott Wood * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18*94a45bb1SScott Wood * MA 02111-1307 USA 19*94a45bb1SScott Wood * 20*94a45bb1SScott Wood */ 21*94a45bb1SScott Wood 22*94a45bb1SScott Wood #include <common.h> 23*94a45bb1SScott Wood #include <ns16550.h> 24*94a45bb1SScott Wood #include <asm/io.h> 25*94a45bb1SScott Wood #include <nand.h> 26*94a45bb1SScott Wood #include <asm/fsl_law.h> 27*94a45bb1SScott Wood #include <asm/fsl_ddr_sdram.h> 28*94a45bb1SScott Wood #include <asm/global_data.h> 29*94a45bb1SScott Wood 30*94a45bb1SScott Wood DECLARE_GLOBAL_DATA_PTR; 31*94a45bb1SScott Wood 32*94a45bb1SScott Wood /* 33*94a45bb1SScott Wood * Fixed sdram init -- doesn't use serial presence detect. 34*94a45bb1SScott Wood */ 35*94a45bb1SScott Wood void sdram_init(void) 36*94a45bb1SScott Wood { 37*94a45bb1SScott Wood ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR; 38*94a45bb1SScott Wood 39*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds); 40*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config); 41*94a45bb1SScott Wood #if CONFIG_CHIP_SELECTS_PER_CTRL > 1 42*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds); 43*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config); 44*94a45bb1SScott Wood #endif 45*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3); 46*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0); 47*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1); 48*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2); 49*94a45bb1SScott Wood 50*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2); 51*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode); 52*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2); 53*94a45bb1SScott Wood 54*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval); 55*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init); 56*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl); 57*94a45bb1SScott Wood 58*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4); 59*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5); 60*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl); 61*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL, &ddr->ddr_wrlvl_cntl); 62*94a45bb1SScott Wood 63*94a45bb1SScott Wood /* Set, but do not enable the memory */ 64*94a45bb1SScott Wood __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg); 65*94a45bb1SScott Wood 66*94a45bb1SScott Wood asm volatile("sync;isync"); 67*94a45bb1SScott Wood udelay(500); 68*94a45bb1SScott Wood 69*94a45bb1SScott Wood /* Let the controller go */ 70*94a45bb1SScott Wood out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN); 71*94a45bb1SScott Wood 72*94a45bb1SScott Wood set_next_law(0, CONFIG_SYS_SDRAM_SIZE_LAW, LAW_TRGT_IF_DDR_1); 73*94a45bb1SScott Wood } 74*94a45bb1SScott Wood 75*94a45bb1SScott Wood void board_init_f(ulong bootflag) 76*94a45bb1SScott Wood { 77*94a45bb1SScott Wood u32 plat_ratio; 78*94a45bb1SScott Wood ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 79*94a45bb1SScott Wood #ifndef CONFIG_QE 80*94a45bb1SScott Wood ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); 81*94a45bb1SScott Wood #endif 82*94a45bb1SScott Wood 83*94a45bb1SScott Wood /* initialize selected port with appropriate baud rate */ 84*94a45bb1SScott Wood plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; 85*94a45bb1SScott Wood plat_ratio >>= 1; 86*94a45bb1SScott Wood gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; 87*94a45bb1SScott Wood 88*94a45bb1SScott Wood NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 89*94a45bb1SScott Wood gd->bus_clk / 16 / CONFIG_BAUDRATE); 90*94a45bb1SScott Wood 91*94a45bb1SScott Wood puts("\nNAND boot... "); 92*94a45bb1SScott Wood 93*94a45bb1SScott Wood #ifndef CONFIG_QE 94*94a45bb1SScott Wood /* init DDR3 reset signal */ 95*94a45bb1SScott Wood __raw_writel(0x02000000, &pgpio->gpdir); 96*94a45bb1SScott Wood __raw_writel(0x00200000, &pgpio->gpodr); 97*94a45bb1SScott Wood __raw_writel(0x00000000, &pgpio->gpdat); 98*94a45bb1SScott Wood udelay(1000); 99*94a45bb1SScott Wood __raw_writel(0x00200000, &pgpio->gpdat); 100*94a45bb1SScott Wood udelay(1000); 101*94a45bb1SScott Wood __raw_writel(0x00000000, &pgpio->gpdir); 102*94a45bb1SScott Wood #endif 103*94a45bb1SScott Wood 104*94a45bb1SScott Wood /* Initialize the DDR3 */ 105*94a45bb1SScott Wood sdram_init(); 106*94a45bb1SScott Wood 107*94a45bb1SScott Wood /* copy code to RAM and jump to it - this should not return */ 108*94a45bb1SScott Wood /* NOTE - code has to be copied out of NAND buffer before 109*94a45bb1SScott Wood * other blocks can be read. 110*94a45bb1SScott Wood */ 111*94a45bb1SScott Wood relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); 112*94a45bb1SScott Wood } 113*94a45bb1SScott Wood 114*94a45bb1SScott Wood void board_init_r(gd_t *gd, ulong dest_addr) 115*94a45bb1SScott Wood { 116*94a45bb1SScott Wood nand_boot(); 117*94a45bb1SScott Wood } 118*94a45bb1SScott Wood 119*94a45bb1SScott Wood void putc(char c) 120*94a45bb1SScott Wood { 121*94a45bb1SScott Wood if (c == '\n') 122*94a45bb1SScott Wood NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); 123*94a45bb1SScott Wood 124*94a45bb1SScott Wood NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); 125*94a45bb1SScott Wood } 126*94a45bb1SScott Wood 127*94a45bb1SScott Wood void puts(const char *str) 128*94a45bb1SScott Wood { 129*94a45bb1SScott Wood while (*str) 130*94a45bb1SScott Wood putc(*str++); 131*94a45bb1SScott Wood } 132