1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <console.h> 9 #include <environment.h> 10 #include <ns16550.h> 11 #include <malloc.h> 12 #include <mmc.h> 13 #include <nand.h> 14 #include <i2c.h> 15 #include <fsl_esdhc.h> 16 #include <spi_flash.h> 17 #include "../common/spl.h" 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 phys_size_t get_effective_memsize(void) 22 { 23 return CONFIG_SYS_L2_SIZE; 24 } 25 26 void board_init_f(ulong bootflag) 27 { 28 u32 plat_ratio, bus_clk; 29 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 30 31 console_init_f(); 32 33 /* Set pmuxcr to allow both i2c1 and i2c2 */ 34 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); 35 setbits_be32(&gur->pmuxcr, 36 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); 37 38 /* Read back the register to synchronize the write. */ 39 in_be32(&gur->pmuxcr); 40 41 #ifdef CONFIG_SPL_SPI_BOOT 42 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); 43 #endif 44 45 /* initialize selected port with appropriate baud rate */ 46 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; 47 plat_ratio >>= 1; 48 bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; 49 gd->bus_clk = bus_clk; 50 51 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 52 bus_clk / 16 / CONFIG_BAUDRATE); 53 #ifdef CONFIG_SPL_MMC_BOOT 54 puts("\nSD boot...\n"); 55 #elif defined(CONFIG_SPL_SPI_BOOT) 56 puts("\nSPI Flash boot...\n"); 57 #endif 58 59 /* copy code to RAM and jump to it - this should not return */ 60 /* NOTE - code has to be copied out of NAND buffer before 61 * other blocks can be read. 62 */ 63 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); 64 } 65 66 void board_init_r(gd_t *gd, ulong dest_addr) 67 { 68 /* Pointer is writable since we allocated a register for it */ 69 gd = (gd_t *)CONFIG_SPL_GD_ADDR; 70 bd_t *bd; 71 72 memset(gd, 0, sizeof(gd_t)); 73 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); 74 memset(bd, 0, sizeof(bd_t)); 75 gd->bd = bd; 76 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; 77 bd->bi_memsize = CONFIG_SYS_L2_SIZE; 78 79 arch_cpu_init(); 80 get_clocks(); 81 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 82 CONFIG_SPL_RELOC_MALLOC_SIZE); 83 gd->flags |= GD_FLG_FULL_MALLOC_INIT; 84 85 #ifndef CONFIG_SPL_NAND_BOOT 86 env_init(); 87 #endif 88 #ifdef CONFIG_SPL_MMC_BOOT 89 mmc_initialize(bd); 90 #endif 91 /* relocate environment function pointers etc. */ 92 #ifdef CONFIG_SPL_NAND_BOOT 93 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 94 (uchar *)CONFIG_ENV_ADDR); 95 gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 96 gd->env_valid = ENV_VALID; 97 #else 98 env_relocate(); 99 #endif 100 101 #ifdef CONFIG_SYS_I2C 102 i2c_init_all(); 103 #else 104 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 105 #endif 106 107 dram_init(); 108 #ifdef CONFIG_SPL_NAND_BOOT 109 puts("Tertiary program loader running in sram..."); 110 #else 111 puts("Second program loader running in sram...\n"); 112 #endif 113 114 #ifdef CONFIG_SPL_MMC_BOOT 115 mmc_boot(); 116 #elif defined(CONFIG_SPL_SPI_BOOT) 117 fsl_spi_boot(); 118 #elif defined(CONFIG_SPL_NAND_BOOT) 119 nand_boot(); 120 #endif 121 } 122