1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <console.h>
9 #include <ns16550.h>
10 #include <malloc.h>
11 #include <mmc.h>
12 #include <nand.h>
13 #include <i2c.h>
14 #include <fsl_esdhc.h>
15 #include <spi_flash.h>
16 #include "../common/spl.h"
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 static const u32 sysclk_tbl[] = {
21 	66666000, 7499900, 83332500, 8999900,
22 	99999000, 11111000, 12499800, 13333200
23 };
24 
25 phys_size_t get_effective_memsize(void)
26 {
27 	return CONFIG_SYS_L2_SIZE;
28 }
29 
30 void board_init_f(ulong bootflag)
31 {
32 	u32 plat_ratio, bus_clk;
33 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
34 
35 	console_init_f();
36 
37 	/* Set pmuxcr to allow both i2c1 and i2c2 */
38 	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
39 	setbits_be32(&gur->pmuxcr,
40 		     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
41 
42 	/* Read back the register to synchronize the write. */
43 	in_be32(&gur->pmuxcr);
44 
45 #ifdef CONFIG_SPL_SPI_BOOT
46 	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
47 #endif
48 
49 	/* initialize selected port with appropriate baud rate */
50 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
51 	plat_ratio >>= 1;
52 	bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
53 	gd->bus_clk = bus_clk;
54 
55 	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
56 		     bus_clk / 16 / CONFIG_BAUDRATE);
57 #ifdef CONFIG_SPL_MMC_BOOT
58 	puts("\nSD boot...\n");
59 #elif defined(CONFIG_SPL_SPI_BOOT)
60 	puts("\nSPI Flash boot...\n");
61 #endif
62 
63 	/* copy code to RAM and jump to it - this should not return */
64 	/* NOTE - code has to be copied out of NAND buffer before
65 	 * other blocks can be read.
66 	 */
67 	relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
68 }
69 
70 void board_init_r(gd_t *gd, ulong dest_addr)
71 {
72 	/* Pointer is writable since we allocated a register for it */
73 	gd = (gd_t *)CONFIG_SPL_GD_ADDR;
74 	bd_t *bd;
75 
76 	memset(gd, 0, sizeof(gd_t));
77 	bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
78 	memset(bd, 0, sizeof(bd_t));
79 	gd->bd = bd;
80 	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
81 	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
82 
83 	arch_cpu_init();
84 	get_clocks();
85 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
86 			CONFIG_SPL_RELOC_MALLOC_SIZE);
87 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
88 
89 #ifndef CONFIG_SPL_NAND_BOOT
90 	env_init();
91 #endif
92 #ifdef CONFIG_SPL_MMC_BOOT
93 	mmc_initialize(bd);
94 #endif
95 	/* relocate environment function pointers etc. */
96 #ifdef CONFIG_SPL_NAND_BOOT
97 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
98 			    (uchar *)CONFIG_ENV_ADDR);
99 	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
100 	gd->env_valid = 1;
101 #else
102 	env_relocate();
103 #endif
104 
105 #ifdef CONFIG_SYS_I2C
106 	i2c_init_all();
107 #else
108 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
109 #endif
110 
111 	dram_init();
112 #ifdef CONFIG_SPL_NAND_BOOT
113 	puts("Tertiary program loader running in sram...");
114 #else
115 	puts("Second program loader running in sram...\n");
116 #endif
117 
118 #ifdef CONFIG_SPL_MMC_BOOT
119 	mmc_boot();
120 #elif defined(CONFIG_SPL_SPI_BOOT)
121 	fsl_spi_boot();
122 #elif defined(CONFIG_SPL_NAND_BOOT)
123 	nand_boot();
124 #endif
125 }
126