1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <ns16550.h>
9 #include <malloc.h>
10 #include <mmc.h>
11 #include <nand.h>
12 #include <i2c.h>
13 #include <fsl_esdhc.h>
14 #include <spi_flash.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 static const u32 sysclk_tbl[] = {
19 	66666000, 7499900, 83332500, 8999900,
20 	99999000, 11111000, 12499800, 13333200
21 };
22 
23 ulong get_effective_memsize(void)
24 {
25 	return CONFIG_SYS_L2_SIZE;
26 }
27 
28 void board_init_f(ulong bootflag)
29 {
30 	u32 plat_ratio, bus_clk;
31 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
32 
33 	console_init_f();
34 
35 	/* Set pmuxcr to allow both i2c1 and i2c2 */
36 	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
37 	setbits_be32(&gur->pmuxcr,
38 		     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
39 
40 	/* Read back the register to synchronize the write. */
41 	in_be32(&gur->pmuxcr);
42 
43 #ifdef CONFIG_SPL_SPI_BOOT
44 	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
45 #endif
46 
47 	/* initialize selected port with appropriate baud rate */
48 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
49 	plat_ratio >>= 1;
50 	bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
51 	gd->bus_clk = bus_clk;
52 
53 	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
54 		     bus_clk / 16 / CONFIG_BAUDRATE);
55 #ifdef CONFIG_SPL_MMC_BOOT
56 	puts("\nSD boot...\n");
57 #elif defined(CONFIG_SPL_SPI_BOOT)
58 	puts("\nSPI Flash boot...\n");
59 #endif
60 
61 	/* copy code to RAM and jump to it - this should not return */
62 	/* NOTE - code has to be copied out of NAND buffer before
63 	 * other blocks can be read.
64 	 */
65 	relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
66 }
67 
68 void board_init_r(gd_t *gd, ulong dest_addr)
69 {
70 	/* Pointer is writable since we allocated a register for it */
71 	gd = (gd_t *)CONFIG_SPL_GD_ADDR;
72 	bd_t *bd;
73 
74 	memset(gd, 0, sizeof(gd_t));
75 	bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
76 	memset(bd, 0, sizeof(bd_t));
77 	gd->bd = bd;
78 	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
79 	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
80 
81 	probecpu();
82 	get_clocks();
83 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
84 			CONFIG_SPL_RELOC_MALLOC_SIZE);
85 
86 #ifndef CONFIG_SPL_NAND_BOOT
87 	env_init();
88 #endif
89 #ifdef CONFIG_SPL_MMC_BOOT
90 	mmc_initialize(bd);
91 #endif
92 	/* relocate environment function pointers etc. */
93 #ifdef CONFIG_SPL_NAND_BOOT
94 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
95 			    (uchar *)CONFIG_ENV_ADDR);
96 	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
97 	gd->env_valid = 1;
98 #else
99 	env_relocate();
100 #endif
101 
102 #ifdef CONFIG_SYS_I2C
103 	i2c_init_all();
104 #else
105 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
106 #endif
107 
108 	gd->ram_size = initdram(0);
109 #ifdef CONFIG_SPL_NAND_BOOT
110 	puts("Tertiary program loader running in sram...");
111 #else
112 	puts("Second program loader running in sram...\n");
113 #endif
114 
115 #ifdef CONFIG_SPL_MMC_BOOT
116 	mmc_boot();
117 #elif defined(CONFIG_SPL_SPI_BOOT)
118 	spi_boot();
119 #elif defined(CONFIG_SPL_NAND_BOOT)
120 	nand_boot();
121 #endif
122 }
123