1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <console.h>
9 #include <ns16550.h>
10 #include <malloc.h>
11 #include <mmc.h>
12 #include <nand.h>
13 #include <i2c.h>
14 #include <fsl_esdhc.h>
15 #include <spi_flash.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 static const u32 sysclk_tbl[] = {
20 	66666000, 7499900, 83332500, 8999900,
21 	99999000, 11111000, 12499800, 13333200
22 };
23 
24 phys_size_t get_effective_memsize(void)
25 {
26 	return CONFIG_SYS_L2_SIZE;
27 }
28 
29 void board_init_f(ulong bootflag)
30 {
31 	u32 plat_ratio, bus_clk;
32 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
33 
34 	console_init_f();
35 
36 	/* Set pmuxcr to allow both i2c1 and i2c2 */
37 	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
38 	setbits_be32(&gur->pmuxcr,
39 		     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
40 
41 	/* Read back the register to synchronize the write. */
42 	in_be32(&gur->pmuxcr);
43 
44 #ifdef CONFIG_SPL_SPI_BOOT
45 	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
46 #endif
47 
48 	/* initialize selected port with appropriate baud rate */
49 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
50 	plat_ratio >>= 1;
51 	bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
52 	gd->bus_clk = bus_clk;
53 
54 	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
55 		     bus_clk / 16 / CONFIG_BAUDRATE);
56 #ifdef CONFIG_SPL_MMC_BOOT
57 	puts("\nSD boot...\n");
58 #elif defined(CONFIG_SPL_SPI_BOOT)
59 	puts("\nSPI Flash boot...\n");
60 #endif
61 
62 	/* copy code to RAM and jump to it - this should not return */
63 	/* NOTE - code has to be copied out of NAND buffer before
64 	 * other blocks can be read.
65 	 */
66 	relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
67 }
68 
69 void board_init_r(gd_t *gd, ulong dest_addr)
70 {
71 	/* Pointer is writable since we allocated a register for it */
72 	gd = (gd_t *)CONFIG_SPL_GD_ADDR;
73 	bd_t *bd;
74 
75 	memset(gd, 0, sizeof(gd_t));
76 	bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
77 	memset(bd, 0, sizeof(bd_t));
78 	gd->bd = bd;
79 	bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
80 	bd->bi_memsize = CONFIG_SYS_L2_SIZE;
81 
82 	probecpu();
83 	get_clocks();
84 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
85 			CONFIG_SPL_RELOC_MALLOC_SIZE);
86 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
87 
88 #ifndef CONFIG_SPL_NAND_BOOT
89 	env_init();
90 #endif
91 #ifdef CONFIG_SPL_MMC_BOOT
92 	mmc_initialize(bd);
93 #endif
94 	/* relocate environment function pointers etc. */
95 #ifdef CONFIG_SPL_NAND_BOOT
96 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
97 			    (uchar *)CONFIG_ENV_ADDR);
98 	gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
99 	gd->env_valid = 1;
100 #else
101 	env_relocate();
102 #endif
103 
104 #ifdef CONFIG_SYS_I2C
105 	i2c_init_all();
106 #else
107 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
108 #endif
109 
110 	gd->ram_size = initdram(0);
111 #ifdef CONFIG_SPL_NAND_BOOT
112 	puts("Tertiary program loader running in sram...");
113 #else
114 	puts("Second program loader running in sram...\n");
115 #endif
116 
117 #ifdef CONFIG_SPL_MMC_BOOT
118 	mmc_boot();
119 #elif defined(CONFIG_SPL_SPI_BOOT)
120 	spi_boot();
121 #elif defined(CONFIG_SPL_NAND_BOOT)
122 	nand_boot();
123 #endif
124 }
125