1*702e6014SWolfgang DenkOverview
2*702e6014SWolfgang Denk--------
3*702e6014SWolfgang DenkP1_P2_RDB_PC represents a set of boards including
4*702e6014SWolfgang Denk    P1020MSBG-PC
5*702e6014SWolfgang Denk    P1020RDB-PC
6*702e6014SWolfgang Denk    P1020UTM-PC
7*702e6014SWolfgang Denk    P1021RDB-PC
8*702e6014SWolfgang Denk    P1024RDB
9*702e6014SWolfgang Denk    P1025RDB
10*702e6014SWolfgang Denk    P2020RDB-PC
11*702e6014SWolfgang Denk
12*702e6014SWolfgang DenkThey have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
13*702e6014SWolfgang Denkhas 64-bit DDR. All others have 32-bit DDR.
14*702e6014SWolfgang Denk
15*702e6014SWolfgang DenkKey features on these boards include:
16*702e6014SWolfgang Denk    * DDR3
17*702e6014SWolfgang Denk    * NOR flash
18*702e6014SWolfgang Denk    * NAND flash (on RDB's only)
19*702e6014SWolfgang Denk    * SPI flash (on RDB's only)
20*702e6014SWolfgang Denk    * SDHC/MMC card slot
21*702e6014SWolfgang Denk    * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
22*702e6014SWolfgang Denk    * PCIE slot and mini-PCIE slots
23*702e6014SWolfgang Denk
24*702e6014SWolfgang DenkAs these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
25*702e6014SWolfgang Denkis used to store SPD data. In case of absent or corrupted SPD, falling back
26*702e6014SWolfgang Denkto timing data embedded in the source code will be used. Raw timing data is
27*702e6014SWolfgang Denkextracted from DDR chip datasheet. Different speeds of DDR are supported with
28*702e6014SWolfgang Denkthis approach. ODT option is forced to fit this set of boards, again because
29*702e6014SWolfgang Denkthey don't have regular DIMMs.
30*702e6014SWolfgang Denk
31*702e6014SWolfgang DenkCONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification
32*702e6014SWolfgang Denkfor writing timing.
33*702e6014SWolfgang Denk
34*702e6014SWolfgang DenkVSC firmware Address is defined by default in config file for eTSEC1.
35*702e6014SWolfgang Denk
36*702e6014SWolfgang DenkSD width is based off DIP switch. DIP switch is detected on the
37*702e6014SWolfgang Denkboard by reading i2c bus and setting the appropriate mux values.
38*702e6014SWolfgang Denk
39*702e6014SWolfgang DenkSome boards have QE module in the silicon (P1021 and P1025). QE and eLBC have
40*702e6014SWolfgang Denkpins multiplexing. QE function needs to be disabled to access Nor Flash and
41*702e6014SWolfgang DenkCPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
42*702e6014SWolfgang Denkin hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
43*702e6014SWolfgang Denkenable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
44*702e6014SWolfgang Denk
45*702e6014SWolfgang Denk'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
46*702e6014SWolfgang Denk'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.
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