1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 257072338SChunhe Lan /* 357072338SChunhe Lan * Copyright 2013 Freescale Semiconductor, Inc. 457072338SChunhe Lan */ 557072338SChunhe Lan 657072338SChunhe Lan #include <common.h> 757072338SChunhe Lan #include <asm/mmu.h> 857072338SChunhe Lan 957072338SChunhe Lan struct fsl_e_tlb_entry tlb_table[] = { 1057072338SChunhe Lan /* TLB 0 - for temp stack in cache */ 1157072338SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, 1257072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 1357072338SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 1457072338SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, 1557072338SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, 1657072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 1757072338SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 1857072338SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, 1957072338SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, 2057072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 2157072338SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 2257072338SChunhe Lan SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, 2357072338SChunhe Lan CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, 2457072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, 0, 2557072338SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 0), 2657072338SChunhe Lan 2757072338SChunhe Lan /* TLB 1 */ 2857072338SChunhe Lan /* *I*** - Covers boot page */ 2957072338SChunhe Lan SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, 3057072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, 3157072338SChunhe Lan 0, 0, BOOKE_PAGESZ_4K, 1), 3257072338SChunhe Lan 3357072338SChunhe Lan /* *I*G* - CCSRBAR */ 3457072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, 3557072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 3657072338SChunhe Lan 0, 1, BOOKE_PAGESZ_4M, 1), 3757072338SChunhe Lan 3857072338SChunhe Lan /* W**G* - Flash, localbus */ 3957072338SChunhe Lan /* This will be changed to *I*G* after relocation to RAM. */ 4057072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, 4157072338SChunhe Lan MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G, 4257072338SChunhe Lan 0, 2, BOOKE_PAGESZ_256M, 1), 4357072338SChunhe Lan 4457072338SChunhe Lan /* *I*G* - PCI */ 4557072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT, CONFIG_SYS_PCIE3_MEM_PHYS, 4657072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 4757072338SChunhe Lan 0, 3, BOOKE_PAGESZ_1G, 1), 4857072338SChunhe Lan 4957072338SChunhe Lan /* *I*G* - PCI */ 5057072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x40000000, 5157072338SChunhe Lan CONFIG_SYS_PCIE3_MEM_PHYS + 0x40000000, 5257072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 5357072338SChunhe Lan 0, 4, BOOKE_PAGESZ_256M, 1), 5457072338SChunhe Lan 5557072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x50000000, 5657072338SChunhe Lan CONFIG_SYS_PCIE3_MEM_PHYS + 0x50000000, 5757072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 5857072338SChunhe Lan 0, 5, BOOKE_PAGESZ_256M, 1), 5957072338SChunhe Lan 6057072338SChunhe Lan /* *I*G* - PCI I/O */ 6157072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_VIRT, CONFIG_SYS_PCIE3_IO_PHYS, 6257072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 6357072338SChunhe Lan 0, 6, BOOKE_PAGESZ_256K, 1), 6457072338SChunhe Lan 6557072338SChunhe Lan /* Bman/Qman */ 6657072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS, 6757072338SChunhe Lan MAS3_SW|MAS3_SR, 0, 6857072338SChunhe Lan 0, 7, BOOKE_PAGESZ_1M, 1), 6957072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x00100000, 7057072338SChunhe Lan CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000, 7157072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 7257072338SChunhe Lan 0, 8, BOOKE_PAGESZ_1M, 1), 7357072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS, 7457072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_M, 7557072338SChunhe Lan 0, 9, BOOKE_PAGESZ_1M, 1), 7657072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x00100000, 7757072338SChunhe Lan CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000, 7857072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 7957072338SChunhe Lan 0, 10, BOOKE_PAGESZ_1M, 1), 8057072338SChunhe Lan 8157072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, 8257072338SChunhe Lan MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 8357072338SChunhe Lan 0, 11, BOOKE_PAGESZ_16K, 1), 8457072338SChunhe Lan 8557072338SChunhe Lan #ifdef CONFIG_SYS_RAMBOOT 8657072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, 8757072338SChunhe Lan CONFIG_SYS_DDR_SDRAM_BASE, 88316f0d0fSYork Sun MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 8957072338SChunhe Lan 0, 12, BOOKE_PAGESZ_256M, 1), 9057072338SChunhe Lan 9157072338SChunhe Lan SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, 9257072338SChunhe Lan CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, 93316f0d0fSYork Sun MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 9457072338SChunhe Lan 0, 13, BOOKE_PAGESZ_256M, 1), 9557072338SChunhe Lan #endif 9657072338SChunhe Lan }; 9757072338SChunhe Lan 9857072338SChunhe Lan int num_tlb_entries = ARRAY_SIZE(tlb_table); 99