1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Authors:  Roy Zang <tie-fei.zang@freescale.com>
5  *           Chunhe Lan <Chunhe.Lan@freescale.com>
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <command.h>
28 #include <pci.h>
29 #include <asm/io.h>
30 #include <asm/cache.h>
31 #include <asm/processor.h>
32 #include <asm/mmu.h>
33 #include <asm/immap_85xx.h>
34 #include <asm/fsl_pci.h>
35 #include <asm/fsl_ddr_sdram.h>
36 #include <asm/fsl_portals.h>
37 #include <libfdt.h>
38 #include <fdt_support.h>
39 #include <netdev.h>
40 #include <malloc.h>
41 #include <fm_eth.h>
42 #include <fsl_mdio.h>
43 #include <miiphy.h>
44 #include <phy.h>
45 #include <asm/fsl_dtsec.h>
46 
47 DECLARE_GLOBAL_DATA_PTR;
48 
49 int board_early_init_f(void)
50 {
51 	fsl_lbc_t *lbc = LBC_BASE_ADDR;
52 
53 	/* Set ABSWP to implement conversion of addresses in the LBC */
54 	setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
55 
56 	return 0;
57 }
58 
59 int checkboard(void)
60 {
61 	printf("Board: P1023 RDB\n");
62 
63 	return 0;
64 }
65 
66 #ifdef CONFIG_PCI
67 void pci_init_board(void)
68 {
69 	fsl_pcie_init_board(0);
70 }
71 #endif
72 
73 int board_early_init_r(void)
74 {
75 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
76 	const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
77 
78 	/*
79 	 * Remap Boot flash + PROMJET region to caching-inhibited
80 	 * so that flash can be erased properly.
81 	 */
82 
83 	/* Flush d-cache and invalidate i-cache of any FLASH data */
84 	flush_dcache();
85 	invalidate_icache();
86 
87 	/* invalidate existing TLB entry for flash + promjet */
88 	disable_tlb(flash_esel);
89 
90 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
91 		MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
92 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
93 
94 	setup_portals();
95 
96 	return 0;
97 }
98 
99 unsigned long get_board_sys_clk(ulong dummy)
100 {
101 	return gd->bus_clk;
102 }
103 
104 unsigned long get_board_ddr_clk(ulong dummy)
105 {
106 	return gd->mem_clk;
107 }
108 
109 int board_eth_init(bd_t *bis)
110 {
111 	ccsr_gur_t *gur = (ccsr_gur_t *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
112 	struct fsl_pq_mdio_info dtsec_mdio_info;
113 
114 	/*
115 	 * Need to set dTSEC 1 pin multiplexing to TSEC. The default setting
116 	 * is not correct.
117 	 */
118 	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TSEC1_1);
119 
120 	dtsec_mdio_info.regs =
121 		(struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
122 	dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
123 
124 	/* Register the 1G MDIO bus */
125 	fsl_pq_mdio_init(bis, &dtsec_mdio_info);
126 
127 	fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_PHY_ADDR);
128 	fm_info_set_phy_address(FM1_DTSEC2, CONFIG_SYS_FM1_DTSEC2_PHY_ADDR);
129 
130 	fm_info_set_mdio(FM1_DTSEC1,
131 			 miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
132 	fm_info_set_mdio(FM1_DTSEC2,
133 			 miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
134 
135 #ifdef CONFIG_FMAN_ENET
136 	cpu_eth_init(bis);
137 #endif
138 
139 	return pci_eth_init(bis);
140 }
141 
142 #if defined(CONFIG_OF_BOARD_SETUP)
143 void ft_board_setup(void *blob, bd_t *bd)
144 {
145 	phys_addr_t base;
146 	phys_size_t size;
147 
148 	ft_cpu_setup(blob, bd);
149 
150 	base = getenv_bootm_low();
151 	size = getenv_bootm_size();
152 
153 	fdt_fixup_memory(blob, (u64)base, (u64)size);
154 
155 #ifdef CONFIG_HAS_FSL_DR_USB
156 	fdt_fixup_dr_usb(blob, bd);
157 #endif
158 
159 	fdt_fixup_fman_ethernet(blob);
160 }
161 #endif
162