1 /* Copyright 2013 Freescale Semiconductor, Inc. 2 * 3 * SPDX-License-Identifier: GPL-2.0+ 4 */ 5 6 #include <common.h> 7 #include <console.h> 8 #include <environment.h> 9 #include <ns16550.h> 10 #include <malloc.h> 11 #include <mmc.h> 12 #include <nand.h> 13 #include <i2c.h> 14 #include <fsl_esdhc.h> 15 #include <spi_flash.h> 16 #include "../common/spl.h" 17 18 DECLARE_GLOBAL_DATA_PTR; 19 20 phys_size_t get_effective_memsize(void) 21 { 22 return CONFIG_SYS_L2_SIZE; 23 } 24 25 void board_init_f(ulong bootflag) 26 { 27 u32 plat_ratio; 28 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 29 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; 30 31 console_init_f(); 32 33 /* Clock configuration to access CPLD using IFC(GPCM) */ 34 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); 35 36 #ifdef CONFIG_TARGET_P1010RDB_PB 37 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS); 38 #endif 39 40 /* initialize selected port with appropriate baud rate */ 41 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; 42 plat_ratio >>= 1; 43 gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; 44 45 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 46 gd->bus_clk / 16 / CONFIG_BAUDRATE); 47 48 #ifdef CONFIG_SPL_MMC_BOOT 49 puts("\nSD boot...\n"); 50 #elif defined(CONFIG_SPL_SPI_BOOT) 51 puts("\nSPI Flash boot...\n"); 52 #endif 53 /* copy code to RAM and jump to it - this should not return */ 54 /* NOTE - code has to be copied out of NAND buffer before 55 * other blocks can be read. 56 */ 57 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); 58 } 59 60 void board_init_r(gd_t *gd, ulong dest_addr) 61 { 62 /* Pointer is writable since we allocated a register for it */ 63 gd = (gd_t *)CONFIG_SPL_GD_ADDR; 64 bd_t *bd; 65 66 memset(gd, 0, sizeof(gd_t)); 67 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); 68 memset(bd, 0, sizeof(bd_t)); 69 gd->bd = bd; 70 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; 71 bd->bi_memsize = CONFIG_SYS_L2_SIZE; 72 73 arch_cpu_init(); 74 get_clocks(); 75 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 76 CONFIG_SPL_RELOC_MALLOC_SIZE); 77 gd->flags |= GD_FLG_FULL_MALLOC_INIT; 78 79 #ifndef CONFIG_SPL_NAND_BOOT 80 env_init(); 81 #endif 82 #ifdef CONFIG_SPL_MMC_BOOT 83 mmc_initialize(bd); 84 #endif 85 86 /* relocate environment function pointers etc. */ 87 #ifdef CONFIG_SPL_NAND_BOOT 88 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 89 (uchar *)CONFIG_ENV_ADDR); 90 gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 91 gd->env_valid = ENV_VALID; 92 #else 93 env_relocate(); 94 #endif 95 96 i2c_init_all(); 97 98 dram_init(); 99 #ifdef CONFIG_SPL_NAND_BOOT 100 puts("\nTertiary program loader running in sram..."); 101 #else 102 puts("\nSecond program loader running in sram..."); 103 #endif 104 105 #ifdef CONFIG_SPL_MMC_BOOT 106 mmc_boot(); 107 #elif defined(CONFIG_SPL_SPI_BOOT) 108 fsl_spi_boot(); 109 #elif defined(CONFIG_SPL_NAND_BOOT) 110 nand_boot(); 111 #endif 112 } 113