1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/arch/crm_regs.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/iomux-mx53.h>
14 #include <asm/errno.h>
15 #include <netdev.h>
16 #include <mmc.h>
17 #include <fsl_esdhc.h>
18 #include <asm/gpio.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 int dram_init(void)
23 {
24 	u32 size1, size2;
25 
26 	size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
27 	size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
28 
29 	gd->ram_size = size1 + size2;
30 
31 	return 0;
32 }
33 void dram_init_banksize(void)
34 {
35 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
36 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
37 
38 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
39 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
40 }
41 
42 #define UART_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
43 			 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
44 
45 static void setup_iomux_uart(void)
46 {
47 	static const iomux_v3_cfg_t uart_pads[] = {
48 		NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
49 		NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
50 	};
51 
52 	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
53 }
54 
55 static void setup_iomux_fec(void)
56 {
57 	static const iomux_v3_cfg_t fec_pads[] = {
58 		NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
59 			PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE),
60 		NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
61 		NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
62 				PAD_CTL_HYS | PAD_CTL_PKE),
63 		NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
64 				PAD_CTL_HYS | PAD_CTL_PKE),
65 		NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
66 		NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
67 		NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
68 		NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
69 				PAD_CTL_HYS | PAD_CTL_PKE),
70 		NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
71 				PAD_CTL_HYS | PAD_CTL_PKE),
72 		NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
73 				PAD_CTL_HYS | PAD_CTL_PKE),
74 	};
75 
76 	imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
77 }
78 
79 #ifdef CONFIG_FSL_ESDHC
80 struct fsl_esdhc_cfg esdhc_cfg[1] = {
81 	{MMC_SDHC1_BASE_ADDR},
82 };
83 
84 int board_mmc_getcd(struct mmc *mmc)
85 {
86 	imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13);
87 	gpio_direction_input(IMX_GPIO_NR(3, 13));
88 	return !gpio_get_value(IMX_GPIO_NR(3, 13));
89 }
90 
91 #define SD_CMD_PAD_CTRL		(PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
92 				 PAD_CTL_PUS_100K_UP)
93 #define SD_PAD_CTRL		(PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
94 				 PAD_CTL_DSE_HIGH)
95 
96 int board_mmc_init(bd_t *bis)
97 {
98 	static const iomux_v3_cfg_t sd1_pads[] = {
99 		NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
100 		NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
101 		NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
102 		NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
103 		NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
104 		NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
105 		MX53_PAD_EIM_DA13__GPIO3_13,
106 	};
107 
108 	u32 index;
109 	s32 status = 0;
110 
111 	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
112 
113 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
114 		switch (index) {
115 		case 0:
116 			imx_iomux_v3_setup_multiple_pads(sd1_pads,
117 							 ARRAY_SIZE(sd1_pads));
118 			break;
119 
120 		default:
121 			printf("Warning: you configured more ESDHC controller"
122 				"(%d) as supported by the board(1)\n",
123 				CONFIG_SYS_FSL_ESDHC_NUM);
124 			return status;
125 		}
126 		status |= fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
127 	}
128 
129 	return status;
130 }
131 #endif
132 
133 int board_early_init_f(void)
134 {
135 	setup_iomux_uart();
136 	setup_iomux_fec();
137 
138 	return 0;
139 }
140 
141 int board_init(void)
142 {
143 	/* address of boot parameters */
144 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
145 
146 	return 0;
147 }
148 
149 int checkboard(void)
150 {
151 	puts("Board: MX53SMD\n");
152 
153 	return 0;
154 }
155