1 /* 2 * 3 * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com> 4 * 5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 27 #include <common.h> 28 #include <netdev.h> 29 #include <asm/arch/clock.h> 30 #include <asm/arch/imx-regs.h> 31 #include <asm/arch/sys_proto.h> 32 #include <watchdog.h> 33 #include <power/pmic.h> 34 #include <fsl_pmic.h> 35 #include <errno.h> 36 37 DECLARE_GLOBAL_DATA_PTR; 38 39 #ifdef CONFIG_SPL_BUILD 40 void board_init_f(ulong bootflag) 41 { 42 /* 43 * copy ourselves from where we are running to where we were 44 * linked at. Use ulong pointers as all addresses involved 45 * are 4-byte-aligned. 46 */ 47 ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst; 48 asm volatile ("ldr %0, =_start" : "=r"(start_ptr)); 49 asm volatile ("ldr %0, =_end" : "=r"(end_ptr)); 50 asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr)); 51 asm volatile ("adr %0, board_init_f" : "=r"(run_ptr)); 52 for (dst = start_ptr; dst < end_ptr; dst++) 53 *dst = *(dst+(run_ptr-link_ptr)); 54 /* 55 * branch to nand_boot's link-time address. 56 */ 57 asm volatile("ldr pc, =nand_boot"); 58 } 59 #endif 60 61 int dram_init(void) 62 { 63 /* dram_init must store complete ramsize in gd->ram_size */ 64 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 65 PHYS_SDRAM_1_SIZE); 66 return 0; 67 } 68 69 int board_early_init_f(void) 70 { 71 /* CS5: CPLD incl. network controller */ 72 static const struct mxc_weimcs cs5 = { 73 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */ 74 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3), 75 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */ 76 CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1), 77 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/ 78 CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0) 79 }; 80 81 mxc_setup_weimcs(5, &cs5); 82 83 /* Setup UART1 and SPI2 pins */ 84 mx31_uart1_hw_init(); 85 mx31_spi2_hw_init(); 86 87 return 0; 88 } 89 90 int board_init(void) 91 { 92 /* adress of boot parameters */ 93 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 94 95 return 0; 96 } 97 98 int board_late_init(void) 99 { 100 u32 val; 101 struct pmic *p; 102 int ret; 103 104 ret = pmic_init(I2C_PMIC); 105 if (ret) 106 return ret; 107 108 p = pmic_get("FSL_PMIC"); 109 if (!p) 110 return -ENODEV; 111 /* Enable RTC battery */ 112 pmic_reg_read(p, REG_POWER_CTL0, &val); 113 pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN); 114 pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI); 115 #ifdef CONFIG_HW_WATCHDOG 116 hw_watchdog_init(); 117 #endif 118 return 0; 119 } 120 121 int checkboard(void) 122 { 123 printf("Board: MX31PDK\n"); 124 return 0; 125 } 126 127 int board_eth_init(bd_t *bis) 128 { 129 int rc = 0; 130 #ifdef CONFIG_SMC911X 131 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 132 #endif 133 return rc; 134 } 135