1 /*
2  *
3  * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4  *
5  * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 
27 #include <common.h>
28 #include <netdev.h>
29 #include <asm/arch/clock.h>
30 #include <asm/arch/imx-regs.h>
31 #include <asm/arch/sys_proto.h>
32 #include <watchdog.h>
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 #ifdef CONFIG_HW_WATCHDOG
37 void hw_watchdog_reset(void)
38 {
39 	mxc_hw_watchdog_reset();
40 }
41 #endif
42 
43 int dram_init(void)
44 {
45 	/* dram_init must store complete ramsize in gd->ram_size */
46 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
47 				PHYS_SDRAM_1_SIZE);
48 	return 0;
49 }
50 
51 int board_early_init_f(void)
52 {
53 	/* CS5: CPLD incl. network controller */
54 	static const struct mxc_weimcs cs5 = {
55 		/*    sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
56 		CSCR_U(0, 0,  0,  0,  0,  0,   0,  0,  3, 24, 0,  4,  3),
57 		/*   oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
58 		CSCR_L(2,  2,   2,   5,  2,  0,  5,  2,  0,  0,   0,   1),
59 		/*  ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
60 		CSCR_A(2,   2,  2,  2,  0,  0,  2,  2,  0,  0,  0,  0,   0,  0)
61 	};
62 
63 	mxc_setup_weimcs(5, &cs5);
64 
65 	/* Setup UART1 and SPI2 pins */
66 	mx31_uart1_hw_init();
67 	mx31_spi2_hw_init();
68 
69 	return 0;
70 }
71 
72 int board_init(void)
73 {
74 	/* adress of boot parameters */
75 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
76 
77 	return 0;
78 }
79 
80 int board_late_init(void)
81 {
82 #ifdef CONFIG_HW_WATCHDOG
83 	mxc_hw_watchdog_enable();
84 #endif
85 	return 0;
86 }
87 
88 int checkboard(void)
89 {
90 	printf("Board: MX31PDK\n");
91 	return 0;
92 }
93 
94 int board_eth_init(bd_t *bis)
95 {
96 	int rc = 0;
97 #ifdef CONFIG_SMC911X
98 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
99 #endif
100 	return rc;
101 }
102