1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  *
4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  */
19 
20 #include <common.h>
21 #include <asm/io.h>
22 #include <asm/gpio.h>
23 #include <asm/arch/imx-regs.h>
24 #include <asm/arch/iomux-mx25.h>
25 #include <asm/arch/clock.h>
26 #include <mmc.h>
27 #include <fsl_esdhc.h>
28 #include <i2c.h>
29 #include <power/pmic.h>
30 #include <fsl_pmic.h>
31 #include <mc34704.h>
32 
33 #define FEC_RESET_B		IMX_GPIO_NR(4, 8)
34 #define FEC_ENABLE_B		IMX_GPIO_NR(2, 3)
35 #define CARD_DETECT		IMX_GPIO_NR(2, 1)
36 
37 DECLARE_GLOBAL_DATA_PTR;
38 
39 #ifdef CONFIG_FSL_ESDHC
40 struct fsl_esdhc_cfg esdhc_cfg[1] = {
41 	{IMX_MMC_SDHC1_BASE},
42 };
43 #endif
44 
45 /*
46  * FIXME: need to revisit this
47  * The original code enabled PUE and 100-k pull-down without PKE, so the right
48  * value here is likely:
49  *	0 for no pull
50  * or:
51  *	PAD_CTL_PUS_100K_DOWN for 100-k pull-down
52  */
53 #define FEC_OUT_PAD_CTRL	0
54 
55 #define I2C_PAD_CTRL		(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
56 				 PAD_CTL_ODE)
57 
58 static void mx25pdk_fec_init(void)
59 {
60 	static const iomux_v3_cfg_t fec_pads[] = {
61 		MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
62 		MX25_PAD_FEC_RX_DV__FEC_RX_DV,
63 		MX25_PAD_FEC_RDATA0__FEC_RDATA0,
64 		NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
65 		NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
66 		NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
67 		MX25_PAD_FEC_MDIO__FEC_MDIO,
68 		MX25_PAD_FEC_RDATA1__FEC_RDATA1,
69 		NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
70 
71 		NEW_PAD_CTRL(MX25_PAD_D12__GPIO_4_8, 0), /* FEC_RESET_B */
72 		NEW_PAD_CTRL(MX25_PAD_A17__GPIO_2_3, 0), /* FEC_ENABLE_B */
73 	};
74 
75 	static const iomux_v3_cfg_t i2c_pads[] = {
76 		NEW_PAD_CTRL(MX25_PAD_I2C1_CLK__I2C1_CLK, I2C_PAD_CTRL),
77 		NEW_PAD_CTRL(MX25_PAD_I2C1_DAT__I2C1_DAT, I2C_PAD_CTRL),
78 	};
79 
80 	imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
81 
82 	/* Assert RESET and ENABLE low */
83 	gpio_direction_output(FEC_RESET_B, 0);
84 	gpio_direction_output(FEC_ENABLE_B, 0);
85 
86 	udelay(10);
87 
88 	/* Deassert RESET and ENABLE */
89 	gpio_set_value(FEC_RESET_B, 1);
90 	gpio_set_value(FEC_ENABLE_B, 1);
91 
92 	/* Setup I2C pins so that PMIC can turn on PHY supply */
93 	imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads));
94 }
95 
96 int dram_init(void)
97 {
98 	/* dram_init must store complete ramsize in gd->ram_size */
99 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
100 				PHYS_SDRAM_1_SIZE);
101 	return 0;
102 }
103 
104 /*
105  * Set up input pins with hysteresis and 100-k pull-ups
106  */
107 #define UART1_IN_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
108 /*
109  * FIXME: need to revisit this
110  * The original code enabled PUE and 100-k pull-down without PKE, so the right
111  * value here is likely:
112  *	0 for no pull
113  * or:
114  *	PAD_CTL_PUS_100K_DOWN for 100-k pull-down
115  */
116 #define UART1_OUT_PAD_CTRL	0
117 
118 static void mx25pdk_uart1_init(void)
119 {
120 	static const iomux_v3_cfg_t uart1_pads[] = {
121 		NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
122 		NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
123 		NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
124 		NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
125 	};
126 
127 	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
128 }
129 
130 int board_early_init_f(void)
131 {
132 	mx25pdk_uart1_init();
133 
134 	return 0;
135 }
136 
137 int board_init(void)
138 {
139 	/* address of boot parameters */
140 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
141 
142 	return 0;
143 }
144 
145 int board_late_init(void)
146 {
147 	struct pmic *p;
148 	int ret;
149 
150 	mx25pdk_fec_init();
151 
152 	ret = pmic_init(I2C_PMIC);
153 	if (ret)
154 		return ret;
155 
156 	p = pmic_get("FSL_PMIC");
157 	if (!p)
158 		return -ENODEV;
159 
160 	/* Turn on Ethernet PHY supply */
161 	pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE);
162 
163 	return 0;
164 }
165 
166 #ifdef CONFIG_FSL_ESDHC
167 int board_mmc_getcd(struct mmc *mmc)
168 {
169 	/* Set up the Card Detect pin. */
170 	imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_A15__GPIO_2_1, 0));
171 
172 	gpio_direction_input(CARD_DETECT);
173 	return !gpio_get_value(CARD_DETECT);
174 }
175 
176 int board_mmc_init(bd_t *bis)
177 {
178 	static const iomux_v3_cfg_t sdhc1_pads[] = {
179 		NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
180 		NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
181 		NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
182 		NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
183 		NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
184 		NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
185 	};
186 
187 	imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
188 
189 	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
190 	return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
191 }
192 #endif
193 
194 int checkboard(void)
195 {
196 	puts("Board: MX25PDK\n");
197 
198 	return 0;
199 }
200