1 /*
2  * Copyright 2008 Freescale Semiconductor, Inc.
3  *
4  * (C) Copyright 2000
5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <asm/fsl_law.h>
28 #include <asm/mmu.h>
29 
30 /*
31  * LAW(Local Access Window) configuration:
32  *
33  * 0x0000_0000     0x7fff_ffff     DDR                     2G
34  * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
35  * 0xa000_0000     0xbfff_ffff     PCI2 MEM                512M
36  * 0xc000_0000     0xdfff_ffff     RapidIO                 512M
37  * 0xe200_0000     0xe2ff_ffff     PCI1 IO                 16M
38  * 0xe300_0000     0xe3ff_ffff     PCI2 IO                 16M
39  * 0xf800_0000     0xf80f_ffff     CCSRBAR                 1M
40  * 0xf810_0000     0xf81f_ffff     PIXIS                   1M
41  * 0xfe00_0000     0xffff_ffff     FLASH (boot bank)       32M
42  *
43  * Notes:
44  *    CCSRBAR don't need a configured Local Access Window.
45  *    If flash is 8M at default position (last 8M), no LAW needed.
46  */
47 
48 struct law_entry law_table[] = {
49 #if !defined(CONFIG_SPD_EEPROM)
50 	SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
51 #endif
52 	SET_LAW(CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
53 	SET_LAW(CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
54 	SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
55 	SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
56 	SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
57 	SET_LAW((CFG_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC),
58 #if !defined(CONFIG_SPD_EEPROM)
59 	SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
60 #endif
61 	SET_LAW(CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
62 };
63 
64 int num_law_entries = ARRAY_SIZE(law_table);
65