1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2007-2011 Freescale Semiconductor, Inc.
4 * Authors: York Sun <yorksun@freescale.com>
5 * Timur Tabi <timur@freescale.com>
6 *
7 * FSL DIU Framebuffer driver
8 */
9
10 #include <common.h>
11 #include <command.h>
12 #include <asm/io.h>
13 #include <fsl_diu_fb.h>
14 #include "../common/pixis.h"
15
16 #define PX_BRDCFG0_DLINK 0x10
17 #define PX_BRDCFG0_DVISEL 0x08
18
diu_set_pixel_clock(unsigned int pixclock)19 void diu_set_pixel_clock(unsigned int pixclock)
20 {
21 volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
22 volatile ccsr_gur_t *gur = &immap->im_gur;
23 volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
24 unsigned long speed_ccb, temp, pixval;
25
26 speed_ccb = get_bus_freq(0);
27 temp = 1000000000/pixclock;
28 temp *= 1000;
29 pixval = speed_ccb / temp;
30 debug("DIU pixval = %lu\n", pixval);
31
32 /* Modify PXCLK in GUTS CLKDVDR */
33 debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
34 temp = *guts_clkdvdr & 0x2000FFFF;
35 *guts_clkdvdr = temp; /* turn off clock */
36 *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
37 debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
38 }
39
platform_diu_init(unsigned int xres,unsigned int yres,const char * port)40 int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
41 {
42 const char *name;
43 int gamma_fix = 0;
44 u32 pixel_format = 0x88883316;
45 u8 temp;
46
47 temp = in_8(&pixis->brdcfg0);
48
49 if (strncmp(port, "dlvds", 5) == 0) {
50 /* Dual link LVDS */
51 gamma_fix = 1;
52 temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
53 name = "Dual-Link LVDS";
54 } else if (strncmp(port, "lvds", 4) == 0) {
55 /* Single link LVDS */
56 temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
57 name = "Single-Link LVDS";
58 } else {
59 /* DVI */
60 if (in_8(&pixis->ver) == 1) /* Board version */
61 pixel_format = 0x88882317;
62 temp |= PX_BRDCFG0_DVISEL;
63 name = "DVI";
64 }
65
66 printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
67 out_8(&pixis->brdcfg0, temp);
68
69 return fsl_diu_init(xres, yres, pixel_format, gamma_fix);
70 }
71