1*765547dcSHaiying Wang /* 2*765547dcSHaiying Wang * Copyright 2009 Freescale Semiconductor, Inc. 3*765547dcSHaiying Wang * 4*765547dcSHaiying Wang * (C) Copyright 2000 5*765547dcSHaiying Wang * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6*765547dcSHaiying Wang * 7*765547dcSHaiying Wang * See file CREDITS for list of people who contributed to this 8*765547dcSHaiying Wang * project. 9*765547dcSHaiying Wang * 10*765547dcSHaiying Wang * This program is free software; you can redistribute it and/or 11*765547dcSHaiying Wang * modify it under the terms of the GNU General Public License as 12*765547dcSHaiying Wang * published by the Free Software Foundation; either version 2 of 13*765547dcSHaiying Wang * the License, or (at your option) any later version. 14*765547dcSHaiying Wang * 15*765547dcSHaiying Wang * This program is distributed in the hope that it will be useful, 16*765547dcSHaiying Wang * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*765547dcSHaiying Wang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*765547dcSHaiying Wang * GNU General Public License for more details. 19*765547dcSHaiying Wang * 20*765547dcSHaiying Wang * You should have received a copy of the GNU General Public License 21*765547dcSHaiying Wang * along with this program; if not, write to the Free Software 22*765547dcSHaiying Wang * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23*765547dcSHaiying Wang * MA 02111-1307 USA 24*765547dcSHaiying Wang */ 25*765547dcSHaiying Wang 26*765547dcSHaiying Wang #include <common.h> 27*765547dcSHaiying Wang #include <asm/fsl_law.h> 28*765547dcSHaiying Wang #include <asm/mmu.h> 29*765547dcSHaiying Wang 30*765547dcSHaiying Wang /* 31*765547dcSHaiying Wang * LAW(Local Access Window) configuration: 32*765547dcSHaiying Wang * 33*765547dcSHaiying Wang *0) 0x0000_0000 0x7fff_ffff DDR 2G 34*765547dcSHaiying Wang *1) 0xa000_0000 0xbfff_ffff PCIe MEM 512MB 35*765547dcSHaiying Wang *-) 0xe000_0000 0xe00f_ffff CCSR 1M 36*765547dcSHaiying Wang *2) 0xe280_0000 0xe2ff_ffff PCIe I/O 8M 37*765547dcSHaiying Wang *3) 0xc000_0000 0xdfff_ffff SRIO 512MB 38*765547dcSHaiying Wang *4.a) 0xf000_0000 0xf3ff_ffff SDRAM 64MB 39*765547dcSHaiying Wang *4.b) 0xf800_0000 0xf800_7fff BCSR 32KB 40*765547dcSHaiying Wang *4.c) 0xf800_8000 0xf800_ffff PIB (CS4) 32KB 41*765547dcSHaiying Wang *4.d) 0xf801_0000 0xf801_7fff PIB (CS5) 32KB 42*765547dcSHaiying Wang *4.e) 0xfe00_0000 0xffff_ffff Flash 32MB 43*765547dcSHaiying Wang * 44*765547dcSHaiying Wang *Notes: 45*765547dcSHaiying Wang * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. 46*765547dcSHaiying Wang * If flash is 8M at default position (last 8M), no LAW needed. 47*765547dcSHaiying Wang * 48*765547dcSHaiying Wang */ 49*765547dcSHaiying Wang 50*765547dcSHaiying Wang struct law_entry law_table[] = { 51*765547dcSHaiying Wang #ifndef CONFIG_SPD_EEPROM 52*765547dcSHaiying Wang SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_1G, LAW_TRGT_IF_DDR), 53*765547dcSHaiying Wang #endif 54*765547dcSHaiying Wang SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), 55*765547dcSHaiying Wang SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), 56*765547dcSHaiying Wang SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_LBC), 57*765547dcSHaiying Wang }; 58*765547dcSHaiying Wang 59*765547dcSHaiying Wang int num_law_entries = ARRAY_SIZE(law_table); 60