1765547dcSHaiying Wang /* 2765547dcSHaiying Wang * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved. 3765547dcSHaiying Wang * 4765547dcSHaiying Wang * See file CREDITS for list of people who contributed to this 5765547dcSHaiying Wang * project. 6765547dcSHaiying Wang * 7765547dcSHaiying Wang * This program is free software; you can redistribute it and/or 8765547dcSHaiying Wang * modify it under the terms of the GNU General Public License as 9765547dcSHaiying Wang * published by the Free Software Foundation; either version 2 of 10765547dcSHaiying Wang * the License, or (at your option) any later version. 11765547dcSHaiying Wang * 12765547dcSHaiying Wang * This program is distributed in the hope that it will be useful, 13765547dcSHaiying Wang * but WITHOUT ANY WARRANTY; without even the implied warranty of 14765547dcSHaiying Wang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15765547dcSHaiying Wang * GNU General Public License for more details. 16765547dcSHaiying Wang * 17765547dcSHaiying Wang * You should have received a copy of the GNU General Public License 18765547dcSHaiying Wang * along with this program; if not, write to the Free Software 19765547dcSHaiying Wang * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20765547dcSHaiying Wang * MA 02111-1307 USA 21765547dcSHaiying Wang */ 22765547dcSHaiying Wang 23765547dcSHaiying Wang #include <common.h> 24765547dcSHaiying Wang #include <asm/io.h> 25765547dcSHaiying Wang 26765547dcSHaiying Wang #include "bcsr.h" 27765547dcSHaiying Wang 28765547dcSHaiying Wang void enable_8569mds_flash_write() 29765547dcSHaiying Wang { 3016e7559cSDave Liu setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); 31765547dcSHaiying Wang } 32765547dcSHaiying Wang 33765547dcSHaiying Wang void disable_8569mds_flash_write() 34765547dcSHaiying Wang { 35765547dcSHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); 36765547dcSHaiying Wang } 37765547dcSHaiying Wang 38*f82107f6SHaiying Wang void enable_8569mds_qe_uec() 39765547dcSHaiying Wang { 40*f82107f6SHaiying Wang #if defined(CONFIG_SYS_UCC_RGMII_MODE) 41765547dcSHaiying Wang setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), 42765547dcSHaiying Wang BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); 43765547dcSHaiying Wang setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), 44765547dcSHaiying Wang BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); 45750098d3SHaiying Wang setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), 46750098d3SHaiying Wang BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); 47750098d3SHaiying Wang setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), 48750098d3SHaiying Wang BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); 49*f82107f6SHaiying Wang #elif defined(CONFIG_SYS_UCC_RMII_MODE) 50*f82107f6SHaiying Wang /* Set UCC1-4 working at RMII mode */ 51*f82107f6SHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), 52*f82107f6SHaiying Wang BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); 53*f82107f6SHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), 54*f82107f6SHaiying Wang BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); 55*f82107f6SHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), 56*f82107f6SHaiying Wang BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); 57*f82107f6SHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), 58*f82107f6SHaiying Wang BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); 59*f82107f6SHaiying Wang setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN); 60*f82107f6SHaiying Wang #endif 61765547dcSHaiying Wang } 62765547dcSHaiying Wang 63765547dcSHaiying Wang void disable_8569mds_brd_eeprom_write_protect() 64765547dcSHaiying Wang { 65765547dcSHaiying Wang clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), BCSR7_BRD_WRT_PROTECT); 66765547dcSHaiying Wang } 67